From: "David E. Box" <david.e.box@linux.intel.com>
To: thomas.hellstrom@linux.intel.com, rodrigo.vivi@intel.com,
irenic.rajneesh@gmail.com, ilpo.jarvinen@linux.intel.com,
srinivas.pandruvada@linux.intel.com,
intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
xi.pardee@linux.intel.com
Cc: david.e.box@linux.intel.com, hansg@kernel.org,
linux-kernel@vger.kernel.org,
platform-driver-x86@vger.kernel.org,
"Michael J . Ruhl" <michael.j.ruhl@intel.com>
Subject: [PATCH 01/22] platform/x86/intel/vsec: Refactor base_addr handling
Date: Thu, 12 Mar 2026 18:51:40 -0700 [thread overview]
Message-ID: <20260313015202.3660072-2-david.e.box@linux.intel.com> (raw)
In-Reply-To: <20260313015202.3660072-1-david.e.box@linux.intel.com>
The base_addr field in intel_vsec_platform_info was originally added to
support devices that emulate PCI VSEC capabilities in MMIO. Previously,
the code would check at registration time whether base_addr was set,
falling back to the PCI BAR if not.
Refactor this by making base_addr an explicit function parameter. This
clarifies ownership of the value and removes conditional logic from
intel_vsec_add_dev(). It also enables making intel_vsec_platform_info
const in a later patch, since the function no longer needs to write to
info->base_addr.
No functional change intended.
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
Previous change log:
Changes in v7:
- No change
Changes in v6:
- No change
Changes in v5:
- No change
Changes in v4:
- No change
Changes in v3:
- No change
Changes in v2:
- Use pci_resource_start() macro instead of direct pdev->resource array
access (suggested by Ilpo)
drivers/platform/x86/intel/vsec.c | 23 ++++++++++-------------
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel/vsec.c
index 5059d320edf8..46966edca03b 100644
--- a/drivers/platform/x86/intel/vsec.c
+++ b/drivers/platform/x86/intel/vsec.c
@@ -271,14 +271,13 @@ EXPORT_SYMBOL_NS_GPL(intel_vsec_add_aux, "INTEL_VSEC");
static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_header *header,
struct intel_vsec_platform_info *info,
- unsigned long cap_id)
+ unsigned long cap_id, u64 base_addr)
{
struct intel_vsec_device __free(kfree) *intel_vsec_dev = NULL;
struct resource __free(kfree) *res = NULL;
struct resource *tmp;
struct device *parent;
unsigned long quirks = info->quirks;
- u64 base_addr;
int i;
if (info->parent)
@@ -310,11 +309,6 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_header *he
if (quirks & VSEC_QUIRK_TABLE_SHIFT)
header->offset >>= TABLE_OFFSET_SHIFT;
- if (info->base_addr)
- base_addr = info->base_addr;
- else
- base_addr = pdev->resource[header->tbir].start;
-
/*
* The DVSEC/VSEC contains the starting offset and count for a block of
* discovery tables. Create a resource array of these tables to the
@@ -412,7 +406,8 @@ static int get_cap_id(u32 header_id, unsigned long *cap_id)
static int intel_vsec_register_device(struct pci_dev *pdev,
struct intel_vsec_header *header,
- struct intel_vsec_platform_info *info)
+ struct intel_vsec_platform_info *info,
+ u64 base_addr)
{
const struct vsec_feature_dependency *consumer_deps;
struct vsec_priv *priv;
@@ -428,7 +423,7 @@ static int intel_vsec_register_device(struct pci_dev *pdev,
* For others using the exported APIs, add the device directly.
*/
if (!pci_match_id(intel_vsec_pci_ids, pdev))
- return intel_vsec_add_dev(pdev, header, info, cap_id);
+ return intel_vsec_add_dev(pdev, header, info, cap_id, base_addr);
priv = pci_get_drvdata(pdev);
if (priv->state[cap_id] == STATE_REGISTERED ||
@@ -444,7 +439,7 @@ static int intel_vsec_register_device(struct pci_dev *pdev,
consumer_deps = get_consumer_dependencies(priv, cap_id);
if (!consumer_deps || suppliers_ready(priv, consumer_deps, cap_id)) {
- ret = intel_vsec_add_dev(pdev, header, info, cap_id);
+ ret = intel_vsec_add_dev(pdev, header, info, cap_id, base_addr);
if (ret)
priv->state[cap_id] = STATE_SKIP;
else
@@ -464,7 +459,7 @@ static bool intel_vsec_walk_header(struct pci_dev *pdev,
int ret;
for ( ; *header; header++) {
- ret = intel_vsec_register_device(pdev, *header, info);
+ ret = intel_vsec_register_device(pdev, *header, info, info->base_addr);
if (!ret)
have_devices = true;
}
@@ -512,7 +507,8 @@ static bool intel_vsec_walk_dvsec(struct pci_dev *pdev,
pci_read_config_dword(pdev, pos + PCI_DVSEC_HEADER2, &hdr);
header.id = PCI_DVSEC_HEADER2_ID(hdr);
- ret = intel_vsec_register_device(pdev, &header, info);
+ ret = intel_vsec_register_device(pdev, &header, info,
+ pci_resource_start(pdev, header.tbir));
if (ret)
continue;
@@ -557,7 +553,8 @@ static bool intel_vsec_walk_vsec(struct pci_dev *pdev,
header.tbir = INTEL_DVSEC_TABLE_BAR(table);
header.offset = INTEL_DVSEC_TABLE_OFFSET(table);
- ret = intel_vsec_register_device(pdev, &header, info);
+ ret = intel_vsec_register_device(pdev, &header, info,
+ pci_resource_start(pdev, header.tbir));
if (ret)
continue;
--
2.43.0
next prev parent reply other threads:[~2026-03-13 1:52 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-13 1:51 [PATCH 00/22] platform/x86/intel: Add ACPI PMT discovery support and enable NVL PMC telemetry David E. Box
2026-03-13 1:51 ` David E. Box [this message]
2026-03-13 1:51 ` [PATCH 02/22] platform/x86/intel/vsec: Make driver_data info const David E. Box
2026-03-13 1:51 ` [PATCH 03/22] platform/x86/intel/vsec: Decouple add/link helpers from PCI David E. Box
2026-03-13 1:51 ` [PATCH 04/22] platform/x86/intel/vsec: Switch exported helpers from pci_dev to device David E. Box
2026-03-13 1:51 ` [PATCH 05/22] platform/x86/intel/vsec: Return real error codes from registration path David E. Box
2026-03-13 1:51 ` [PATCH 06/22] platform/x86/intel/vsec: Plumb ACPI PMT discovery tables through vsec David E. Box
2026-03-17 16:54 ` Ilpo Järvinen
2026-03-13 1:51 ` [PATCH 07/22] platform/x86/intel/pmt: Add pre/post decode hooks around header parsing David E. Box
2026-03-13 1:51 ` [PATCH 08/22] platform/x86/intel/pmt/crashlog: Split init into pre-decode David E. Box
2026-03-13 1:51 ` [PATCH 09/22] platform/x86/intel/pmt/telemetry: Move overlap check to post-decode hook David E. Box
2026-03-13 1:51 ` [PATCH 10/22] platform/x86/intel/pmt: Move header decode into common helper David E. Box
2026-03-17 15:42 ` Ilpo Järvinen
2026-03-13 1:51 ` [PATCH 11/22] platform/x86/intel/pmt: Pass discovery index instead of resource David E. Box
2026-03-13 1:51 ` [PATCH 12/22] platform/x86/intel/pmt: Unify header fetch and add ACPI source David E. Box
2026-03-17 15:57 ` Ilpo Järvinen
2026-03-13 1:51 ` [PATCH 13/22] platform/x86/intel/pmc: Add PMC SSRAM Kconfig description David E. Box
2026-03-13 1:51 ` [PATCH 14/22] platform/x86/intel/pmc: Add ACPI PWRM telemetry driver for Nova Lake S David E. Box
2026-03-17 16:24 ` Ilpo Järvinen
2026-03-13 1:51 ` [PATCH 15/22] platform/x86/intel/pmc/ssram: Rename probe and PCI ID table for consistency David E. Box
2026-03-17 16:26 ` Ilpo Järvinen
2026-03-13 1:51 ` [PATCH 16/22] platform/x86/intel/pmc/ssram: Use fixed-size static pmc array David E. Box
2026-03-13 1:51 ` [PATCH 17/22] platform/x86/intel/pmc/ssram: Refactor DEVID/PWRMBASE extraction into helper David E. Box
2026-03-17 16:33 ` Ilpo Järvinen
2026-03-13 1:51 ` [PATCH 18/22] platform/x86/intel/pmc/ssram: Add PCI platform data David E. Box
2026-03-17 16:35 ` Ilpo Järvinen
2026-03-13 1:51 ` [PATCH 19/22] platform/x86/intel/pmc/ssram: Refactor memory barrier for reentrant probe David E. Box
2026-03-17 16:40 ` Ilpo Järvinen
2026-03-13 1:51 ` [PATCH 20/22] platform/x86/intel/pmc/ssram: Add ACPI discovery scaffolding David E. Box
2026-03-17 16:45 ` Ilpo Järvinen
2026-03-13 1:52 ` [PATCH 21/22] platform/x86/intel/pmc/ssram: Make PMT registration optional David E. Box
2026-03-17 16:48 ` Ilpo Järvinen
2026-03-13 1:52 ` [PATCH 22/22] platform/x86/intel/pmc: Add NVL PCI IDs for SSRAM telemetry discovery David E. Box
2026-03-13 2:02 ` ✗ CI.checkpatch: warning for platform/x86/intel: Add ACPI PMT discovery support and enable NVL PMC telemetry Patchwork
2026-03-13 2:04 ` ✓ CI.KUnit: success " Patchwork
2026-03-13 2:19 ` ✗ CI.checksparse: warning " Patchwork
2026-03-13 2:39 ` ✓ Xe.CI.BAT: success " Patchwork
2026-03-13 15:03 ` [PATCH 00/22] " srinivas pandruvada
2026-03-14 4:07 ` ✓ Xe.CI.FULL: success for " Patchwork
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