From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5FC8FED9F6 for ; Tue, 17 Mar 2026 17:48:34 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w2YWo-0003Oy-HQ; Tue, 17 Mar 2026 13:48:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w2YWF-0003Le-Nv for qemu-arm@nongnu.org; Tue, 17 Mar 2026 13:47:52 -0400 Received: from mail-dl1-x1229.google.com ([2607:f8b0:4864:20::1229]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1w2YWD-0006xl-R8 for qemu-arm@nongnu.org; Tue, 17 Mar 2026 13:47:51 -0400 Received: by mail-dl1-x1229.google.com with SMTP id a92af1059eb24-128d2e3082eso502381c88.0 for ; Tue, 17 Mar 2026 10:47:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1773769667; x=1774374467; darn=nongnu.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=R8sGN3pUZfb1jPFD6m9bHWDlQGgRDF8SFG+PAv18Xgc=; b=LRaY72vx1y5PFhBszqS/QUbuiZYelmj8uVsWHocRcJPuw5wb2x0TVZlfyX2yethV8E LsSeb0hS6uDEKwkUCqe0TgFbVQ35R1YLyEWPe61mgiz5WogORQM9XspK3IR3UkjQENCz 8Qgi2lpgYRV3K5a1zCbYWGslmptbbNnp2VlEkkyDGA1SzJSJNU6Ar7j4SX5pP5mMDlDx as9nPdzOhMPmquu2tPNEhP1AQgZW+CDmVFrYqGJYPzFCtn6xvlnKPFakbqnoMo3kdjmT jyC1i61PdBXUCQgqL97Filj1oGxPIQpkcBz0zryGuTn1GTh1XwOwDID18vZyiPRUWHAh bR5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1773769667; x=1774374467; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=R8sGN3pUZfb1jPFD6m9bHWDlQGgRDF8SFG+PAv18Xgc=; b=JxsCojGCTscylvuotOka3uCul3WabUreXFev3NWdjen1Zl9NhW8KUmdHvSK819ZzWd JSabAnmScytCABlgwtXlXqesrEHydcb2xF7izTaI4mnpquzQ/PgVPtd8R+oGBT71bN+w B9/anQtg5GaZs+q8an+DuInMG/OhKIg+KvvucplSkXeqLMhN/kuDK1Gi3wWn6klemnSp F15+SUMwTOmk0SiPbGWmTDrrzRBrvx7n2vN3PNXIJRjF2PNrQysCyhS8Ovj28pnmxr0R tHRhIukei/Lv6Y1kaTc1DIm1jeL7tmEEMQrC+0C5XFjICPoTtu3tVG0w5OYMpbkzkGze JibA== X-Gm-Message-State: AOJu0YxLVrpiqux2convcmIfZqpkP1mqQDyMkV3oVp6xlo6VUho/tR2F nVlT3sVOuxDF9wyzEbpuE/3qO302nmaamRsvfipEGmJgrRuZCGZcVNeb X-Gm-Gg: ATEYQzwk1mtO03r5nzY2scywfcGPk3kFFOpW1llX/P2v37AZnk3zEZD/8GYuQw6ukki A8gHvFnSxHg1tQMAeiFzY3obo0CFwurqms4U2LSfnZ3xfgDqi4IItNJiAVXnqWNak3AEYsHsyKe lnElImiHox4xDBQ5AWJjK7S0dUWs5Hpj9QN8fGD4tKk9S+53Daushal8O1iz6Y8hqsRCQi5e0/O R2YHp53VkVzqAiHQL0hWDEVWY0IvHoK2EUVBSA5Lq75lZgl1qWzhBI2JmUNgXcs72wlIif9By5F NDx7XyoDrChkUnjsb+98qvv5SU4D+spxPqXIk3v9gZkeCXRuc8vExkbEcHbO6IEkwx+xWM+CnvD fCNNn43iz9q31ixB1XRoq5UPbLHpenBH71eAtWFUMCgjrVnEMXiChxzcqf+WmK9okh9pBmO8Lx1 FVOG5I1ld4A6WRetGG4jfaObLAvaum829/kyrRs6yvoF7re2vutjMe X-Received: by 2002:a05:7022:6085:b0:128:d202:883 with SMTP id a92af1059eb24-1299ba11ebdmr241545c88.3.1773769667229; Tue, 17 Mar 2026 10:47:47 -0700 (PDT) Received: from localhost.localdomain ([143.54.78.51]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-129b4147522sm281844c88.15.2026.03.17.10.47.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 17 Mar 2026 10:47:46 -0700 (PDT) From: Lucas Amaral To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org, agraf@csgraf.de, peter.maydell@linaro.org, mohamed@unpredictable.fr, alex.bennee@linaro.org, Lucas Amaral Subject: [PATCH v5 0/6] target/arm: ISV=0 data abort emulation library Date: Tue, 17 Mar 2026 14:47:34 -0300 Message-ID: <20260317174740.31674-1-lucaaamaral@gmail.com> X-Mailer: git-send-email 2.52.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1229; envelope-from=lucaaamaral@gmail.com; helo=mail-dl1-x1229.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Add a shared emulation library for AArch64 load/store instructions that cause ISV=0 data aborts under hardware virtualization, and wire it into HVF (macOS) and WHPX (Windows). When the Instruction Syndrome Valid bit is clear, the hypervisor cannot determine the faulting instruction's target register or access size from the syndrome alone. This previously hit an assert(isv) and killed the VM. The library fetches and decodes the faulting instruction using a decodetree-generated decoder, then emulates it directly against the vCPU register file and memory. The library uses its own a64-ldst.decode rather than sharing target/arm/tcg/a64.decode — TCG's trans_* functions emit IR into a translation block, while this library's execute directly. Decode patterns are kept consistent with TCG's where possible; differences are noted in the relevant commit messages. Changes since v4: - Rebased onto current master - Add SPDX license identifier to new meson.build - Resent as new top-level thread (Alex Bennée) Changes since v3: - Document decodetree pattern differences from TCG in commit messages for patches 1/6 and 5/6. Changes since v2: - Inject synchronous external abort (matching kvm_inject_arm_sea() syndrome) on unhandled instruction or memory error, instead of silently advancing PC or returning an error. - Fix WHPX advance_pc bug: error paths no longer advance PC. - Add page-crossing guard in mem_read/mem_write to prevent partial side effects from cpu_memory_rw_debug(). Changes since v1: - Split monolithic patch into 6 incremental patches: framework, then one patch per coherent instruction group (Peter) - Removed per-backend callback ops; library uses CPUArchState directly with cpu_memory_rw_debug() for memory access (Mohamed) - Removed mock unit tests (Mohamed; kvm-unit-tests is the right vehicle for decoder validation) - Added architectural justification for separate decode file Lucas Amaral (6): target/arm/emulate: add ISV=0 emulation library with load/store immediate target/arm/emulate: add load/store register offset target/arm/emulate: add load/store pair target/arm/emulate: add load/store exclusive target/arm/emulate: add atomic, compare-and-swap, and PAC load target/arm/hvf,whpx: wire ISV=0 emulation for data aborts target/arm/emulate/a64-ldst.decode | 293 +++++++++++ target/arm/emulate/arm_emulate.c | 758 +++++++++++++++++++++++++++++ target/arm/emulate/arm_emulate.h | 30 ++ target/arm/emulate/meson.build | 8 + target/arm/hvf/hvf.c | 46 +- target/arm/meson.build | 1 + target/arm/whpx/whpx-all.c | 61 ++- 7 files changed, 1193 insertions(+), 4 deletions(-) create mode 100644 target/arm/emulate/a64-ldst.decode create mode 100644 target/arm/emulate/arm_emulate.c create mode 100644 target/arm/emulate/arm_emulate.h create mode 100644 target/arm/emulate/meson.build -- 2.52.0