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From: Rob Herring <robh@kernel.org>
To: Florian Eckert <fe@dev.tdt.de>
Cc: Thomas Gleixner <tglx@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	Eckert.Florian@googlemail.com, ms@dev.tdt.de
Subject: Re: [PATCH 1/2] dt-bindings: Add Lightning Mountain MSI interrupt controller bindings
Date: Wed, 18 Mar 2026 17:52:13 -0500	[thread overview]
Message-ID: <20260318225213.GA631106-robh@kernel.org> (raw)
In-Reply-To: <20260318-irq-intel-soc-msi-v1-1-0e8cdf844fa8@dev.tdt.de>

On Wed, Mar 18, 2026 at 02:10:40PM +0100, Florian Eckert wrote:
> Add device tree bindings for the Lightning Mountain (LGM) MSI interrupt
> controller.
> 
> Signed-off-by: Florian Eckert <fe@dev.tdt.de>
> ---
>  .../interrupt-controller/intel,soc-msi.yaml        | 45 ++++++++++++++++++++++
>  1 file changed, 45 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/intel,soc-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/intel,soc-msi.yaml
> new file mode 100644
> index 0000000000000000000000000000000000000000..5ab295c7dd000059817ae411abe3d57713a83ee8
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/intel,soc-msi.yaml
> @@ -0,0 +1,45 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +# Copyright 2025 TDT AG.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/interrupt-controller/intel,soc-msi.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Intel LGM Interrupt Controller
> +
> +maintainers:
> +  - Florian Eckert <fe@dev.tdt.de>
> +
> +description: |

Don't need '|' if no formatting.

> +  This interrupt controller is found in the Intel LGM.
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - intel,soc-msi.yaml

Besides the obvious problem here, compatibles should be SoC specific.

> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupt-controller: true
> +
> +  '#interrupt-cells':
> +    const: 2

This is an interrupt controller that generates MSIs from interrupts, or 
an MSI controller that receives MSIs and generates an interrupt. I can't 
tell. The description sounds like the latter. The schema looks like the 
former.

> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupt-controller
> +  - '#interrupt-cells'
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    soc_msi: soc_msi@e00e0000 {

msi-controller@... or interrupt-controller@...

depending on the above answer.

> +        compatible = "intel,soc-msi";
> +        reg = <0xe00e0000 0x800>;
> +        interrupt-controller;
> +        #interrupt-cells = <1>;
> +    };
> 
> -- 
> 2.47.3
> 

  parent reply	other threads:[~2026-03-18 22:52 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-18 13:10 [PATCH 0/2] Add MSI driver support for the Lightning Mountain SoC Florian Eckert
2026-03-18 13:10 ` [PATCH 1/2] dt-bindings: Add Lightning Mountain MSI interrupt controller bindings Florian Eckert
2026-03-18 14:46   ` Rob Herring (Arm)
2026-03-18 22:52   ` Rob Herring [this message]
2026-03-19 11:01   ` Krzysztof Kozlowski
2026-03-18 13:10 ` [PATCH 2/2] irqchip: Add Lightning Mountain irqchip support Florian Eckert
2026-03-19  9:03   ` kernel test robot
2026-03-19 10:41   ` kernel test robot
2026-03-19 11:44   ` kernel test robot
2026-03-20 12:04   ` Thomas Gleixner
2026-03-23 12:14     ` Florian Eckert
2026-03-23 12:28       ` Ricardo Neri
2026-03-23 21:15       ` Thomas Gleixner

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