From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: <alejandro.lucero-palau@amd.com>
Cc: <linux-cxl@vger.kernel.org>, <netdev@vger.kernel.org>,
<dave.jiang@intel.com>, <dan.j.williams@intel.com>,
<edward.cree@amd.com>, <davem@davemloft.net>, <kuba@kernel.org>,
<pabeni@redhat.com>, <edumazet@google.com>,
Alejandro Lucero <alucerop@amd.com>,
Edward Cree <ecree.xilinx@gmail.com>,
Alison Schofield <alison.schofield@intel.com>
Subject: Re: [PATCH v24 01/11] sfc: add cxl support
Date: Tue, 24 Mar 2026 16:29:07 +0000 [thread overview]
Message-ID: <20260324162907.00000c84@huawei.com> (raw)
In-Reply-To: <20260323113117.2352709-2-alejandro.lucero-palau@amd.com>
On Mon, 23 Mar 2026 11:31:07 +0000
<alejandro.lucero-palau@amd.com> wrote:
> From: Alejandro Lucero <alucerop@amd.com>
>
> Add CXL initialization based on new CXL API for accel drivers and make
> it dependent on kernel CXL configuration.
>
> Signed-off-by: Alejandro Lucero <alucerop@amd.com>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Acked-by: Edward Cree <ecree.xilinx@gmail.com>
> Reviewed-by: Alison Schofield <alison.schofield@intel.com>
> Reviewed-by: Dan Williams <dan.j.williams@intel.com>
> Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Hi Alejandro,
Been a while since I looked at this, so I may well repeat earlier discussions!
One really minor thing inline.
> diff --git a/drivers/net/ethernet/sfc/efx_cxl.c b/drivers/net/ethernet/sfc/efx_cxl.c
> new file mode 100644
> index 000000000000..8e0481d8dced
> --- /dev/null
> +++ b/drivers/net/ethernet/sfc/efx_cxl.c
> @@ -0,0 +1,56 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/****************************************************************************
> + *
> + * Driver for AMD network controllers and boards
> + * Copyright (C) 2025, Advanced Micro Devices, Inc.
> + */
> +
> +#include <linux/pci.h>
> +
> +#include "net_driver.h"
> +#include "efx_cxl.h"
> +
> +#define EFX_CTPIO_BUFFER_SIZE SZ_256M
> +
> +int efx_cxl_init(struct efx_probe_data *probe_data)
> +{
> + struct efx_nic *efx = &probe_data->efx;
> + struct pci_dev *pci_dev = efx->pci_dev;
> + struct efx_cxl *cxl;
> + u16 dvsec;
> +
> + probe_data->cxl_pio_initialised = false;
> +
> + /* Is the device configured with and using CXL? */
> + if (!pcie_is_cxl(pci_dev))
> + return 0;
> +
> + dvsec = pci_find_dvsec_capability(pci_dev, PCI_VENDOR_ID_CXL,
> + PCI_DVSEC_CXL_DEVICE);
> + if (!dvsec) {
> + pci_err(pci_dev, "CXL_DVSEC_PCIE_DEVICE capability not found\n");
Trivial but if we are returning zero is it always an error?
Maybe pci_info() more appropriate?
> + return 0;
> + }
> +
> + pci_dbg(pci_dev, "CXL_DVSEC_PCIE_DEVICE capability found\n");
> +
> + /* Create a cxl_dev_state embedded in the cxl struct using cxl core api
> + * specifying no mbox available.
> + */
> + cxl = devm_cxl_dev_state_create(&pci_dev->dev, CXL_DEVTYPE_DEVMEM,
> + pci_dev->dev.id, dvsec, struct efx_cxl,
next prev parent reply other threads:[~2026-03-24 16:29 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-23 11:31 [PATCH v24 00/11] Type2 device basic support alejandro.lucero-palau
2026-03-23 11:31 ` [PATCH v24 01/11] sfc: add cxl support alejandro.lucero-palau
2026-03-24 16:29 ` Jonathan Cameron [this message]
2026-03-24 21:05 ` Alejandro Lucero Palau
2026-03-23 11:31 ` [PATCH v24 02/11] cxl/sfc: Map cxl regs alejandro.lucero-palau
2026-03-24 16:33 ` Jonathan Cameron
2026-03-24 21:06 ` Alejandro Lucero Palau
2026-03-23 11:31 ` [PATCH v24 03/11] cxl/sfc: Initialize dpa without a mailbox alejandro.lucero-palau
2026-03-23 11:31 ` [PATCH v24 04/11] cxl: Prepare memdev creation for type2 alejandro.lucero-palau
2026-03-23 11:31 ` [PATCH v24 05/11] sfc: create type2 cxl memdev alejandro.lucero-palau
2026-03-23 11:31 ` [PATCH v24 06/11] cxl/hdm: Add support for getting region from committed decoder alejandro.lucero-palau
2026-03-24 16:48 ` Jonathan Cameron
2026-03-24 21:20 ` Alejandro Lucero Palau
2026-03-24 17:32 ` Dave Jiang
2026-03-24 21:55 ` Alejandro Lucero Palau
2026-03-27 19:36 ` Cheatham, Benjamin
2026-03-30 10:26 ` Alejandro Lucero Palau
2026-03-23 11:31 ` [PATCH v24 07/11] cxl: Add function for obtaining region range alejandro.lucero-palau
2026-03-27 19:36 ` Cheatham, Benjamin
2026-03-23 11:31 ` [PATCH v24 08/11] cxl: Export function for unwinding cxl by accelerators alejandro.lucero-palau
2026-03-24 16:50 ` Jonathan Cameron
2026-03-24 21:36 ` Alejandro Lucero Palau
2026-03-26 21:28 ` Cheatham, Benjamin
2026-03-27 19:36 ` Cheatham, Benjamin
2026-03-23 11:31 ` [PATCH v24 09/11] sfc: obtain decoder and region if committed by firmware alejandro.lucero-palau
2026-03-24 16:56 ` Jonathan Cameron
2026-03-24 21:43 ` Alejandro Lucero Palau
2026-03-24 17:38 ` Dave Jiang
2026-03-24 22:02 ` Alejandro Lucero Palau
2026-03-23 11:31 ` [PATCH v24 10/11] cxl: Avoid dax creation for accelerators alejandro.lucero-palau
2026-03-25 2:59 ` Alison Schofield
2026-03-30 14:26 ` Alejandro Lucero Palau
2026-03-30 22:36 ` Alison Schofield
2026-03-23 11:31 ` [PATCH v24 11/11] sfc: support pio mapping based on cxl alejandro.lucero-palau
2026-03-23 22:18 ` Edward Cree
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