From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8925210F2861 for ; Fri, 27 Mar 2026 17:32:53 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1w6B2r-0006WN-Dq; Fri, 27 Mar 2026 13:32:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w6B2p-0006W0-Le for qemu-arm@nongnu.org; Fri, 27 Mar 2026 13:32:27 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1w6B2o-0007wn-2W for qemu-arm@nongnu.org; Fri, 27 Mar 2026 13:32:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1774632744; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=rCwOOApMVOWmTS+mhHf4Ip1slQt8k5/TMOMLBnHMa8o=; b=E9IkQVvr5hafPITGfTm7yb2GOsrgIfN6yMFksTT1Xcd6CFUZVyzTz4Xh8bodf4QFFPJjRb ivRQPtp/Z++CifPVGLcWx84WUcSiSs7B/SrfbG7MBh4HQC1WEacxWn/qPG2l2IUFok6VsG eG/O87Rp+p09lCbv4CVCpkwPjH8G8W8= Received: from mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-137-xReoy4zoNDeH_QM0gdLZtQ-1; Fri, 27 Mar 2026 13:32:22 -0400 X-MC-Unique: xReoy4zoNDeH_QM0gdLZtQ-1 X-Mimecast-MFC-AGG-ID: xReoy4zoNDeH_QM0gdLZtQ_1774632741 Received: from mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.4]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 2CA9619560AA; Fri, 27 Mar 2026 17:32:20 +0000 (UTC) Received: from mbawa-thinkpadt14gen5.bengluru.csb (unknown [10.74.88.2]) by mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 52C8A30001A1; Fri, 27 Mar 2026 17:32:11 +0000 (UTC) From: Mohammadfaiz Bawa To: qemu-devel@nongnu.org Cc: stefanb@linux.vnet.ibm.com, pierrick.bouvier@linaro.org, "Michael S . Tsirkin" , imammedo@redhat.com, anisinha@redhat.com, peter.maydell@linaro.org, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, mohamed@unpredictable.fr, philmd@linaro.org, Mohammadfaiz Bawa Subject: [PATCH v3 0/3] hw/tpm: add PPI support to tpm-tis-device on ARM64 virt Date: Fri, 27 Mar 2026 23:02:06 +0530 Message-ID: <20260327173209.148180-1-mbawa@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 X-Mimecast-MFC-PROC-ID: sPHtQBgii9kJEQdudVuoglW6JW-z8xSwF7TTmQa8d3U_1774632741 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: 8bit content-type: text/plain; charset="US-ASCII"; x-default=true Received-SPF: pass client-ip=170.10.129.124; envelope-from=mbawa@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org The ARM virt machine's tpm-tis-device lacks Physical Presence Interface (PPI) support - no _DSM, _STA, or PPI operation regions in the ACPI namespace. This causes Windows 11 ARM64 guests to log Event ID 15 (tpm.sys) errors per boot. This series documents the change, refactors tpm_build_ppi_acpi() to accept a dynamic PPI base address, then wires up PPI MMIO and ACPI on tpm-tis-sysbus via the platform bus. Tested: aarch64 KVM, upstream QEMU, Win11 ARM64 25H2, swtpm. Event ID 15 eliminated. Changes in v3: - Rebased on top of Philippe's ppi_enabled refactoring series - Updated sysbus to set ppi_enabled on TPMIfClass instead of instance property - Updated x86 CRB caller in hw/i386/acpi-build.c to pass ppi_base (Stefan) Changes in v2: - Moved tpm.rst documentation hunk from patch 3 into patch 1 (Stefan) - Added Reviewed-by tags Based-on: 20260317120241.16320-1-philmd@linaro.org Signed-off-by: Mohammadfaiz Bawa Mohammadfaiz Bawa (3): docs/specs/tpm: document PPI support on ARM64 virt hw/acpi/tpm: parameterize PPI base address in tpm_build_ppi_acpi hw/tpm: add PPI support to tpm-tis-device for ARM64 virt docs/specs/tpm.rst | 24 ++++++++++++++++++++++++ hw/acpi/tpm.c | 8 ++++---- hw/arm/virt-acpi-build.c | 9 ++++++++- hw/i386/acpi-build.c | 2 +- hw/tpm/tpm_tis_isa.c | 2 +- hw/tpm/tpm_tis_sysbus.c | 11 +++++++++++ include/hw/acpi/tpm.h | 3 ++- 7 files changed, 51 insertions(+), 8 deletions(-) base-commit: 9eadbfc48dc892339273890709539e45d7d14219 -- 2.53.0