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Wed, 1 Apr 2026 01:02:36 +0000 Received: from DS2PR12MB9567.namprd12.prod.outlook.com ([fe80::636:1b52:24ca:d7e5]) by DS2PR12MB9567.namprd12.prod.outlook.com ([fe80::636:1b52:24ca:d7e5%3]) with mapi id 15.20.9769.015; Wed, 1 Apr 2026 01:02:36 +0000 From: Nathan Chen To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Yi Liu , Eric Auger , Zhenzhong Duan , Peter Maydell , Marcel Apfelbaum , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Yanan Wang , Zhao Liu , Alex Williamson , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , Shameer Kolothum , Matt Ochs , Nicolin Chen , Nathan Chen Subject: [PATCH 01/11] hw/arm/smmuv3-accel: Add helper for resolving auto parameters Date: Tue, 31 Mar 2026 18:02:21 -0700 Message-ID: <20260401010231.4166776-2-nathanc@nvidia.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260401010231.4166776-1-nathanc@nvidia.com> References: <20260401010231.4166776-1-nathanc@nvidia.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: SJ2PR07CA0004.namprd07.prod.outlook.com (2603:10b6:a03:505::10) To DS2PR12MB9567.namprd12.prod.outlook.com (2603:10b6:8:27c::8) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PR12MB9567:EE_|CH1PR12MB9647:EE_ X-MS-Office365-Filtering-Correlation-Id: 090e9568-1615-49db-583f-08de8f8a5cf4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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envelope-from=nathanc@nvidia.com; helo=DM1PR04CU001.outbound.protection.outlook.com X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.54, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FORGED_SPF_HELO=1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org From: Nathan Chen Introduce smmuv3_accel_auto_finalise() to resolve properties that are set to 'auto' for accelerated SMMUv3. This helper function allows properties such as ats, ril, ssidsize, and oas support to be resolved from host IOMMU capabilities via IOMMU_GET_HW_INFO. Auto mode requires at least one cold-plugged device to retrieve and finalise these properties. Register a machine_init_done notifier to verify this requirement and fail boot if it is not met. Hot-plugged devices into an accel SMMUv3-associated bus will re-use the resolved host values from the initial cold-plug. Subsequent patches will make use of this helper to resolve 'auto' to what is reported by host IOMMU capabilities. Suggested-by: Shameer Kolothum Signed-off-by: Nathan Chen --- hw/arm/smmuv3-accel.c | 14 ++++++++++++++ hw/arm/smmuv3-accel.h | 2 ++ hw/arm/smmuv3.c | 20 ++++++++++++++++++++ include/hw/arm/smmuv3.h | 2 ++ 4 files changed, 38 insertions(+) diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c index 65c2f44880..a0146c8d31 100644 --- a/hw/arm/smmuv3-accel.c +++ b/hw/arm/smmuv3-accel.c @@ -35,11 +35,25 @@ static int smmuv3_oas_bits(uint32_t oas) return map[oas]; } +static void smmuv3_accel_auto_finalise(SMMUv3State *s, + struct iommu_hw_info_arm_smmuv3 *info) { + SMMUv3AccelState *accel = s->s_accel; + + /* Return if no auto for any or finalised already */ + if (!accel->auto_mode || accel->auto_finalised) { + return; + } + + accel->auto_finalised = true; +} + static bool smmuv3_accel_check_hw_compatible(SMMUv3State *s, struct iommu_hw_info_arm_smmuv3 *info, Error **errp) { + smmuv3_accel_auto_finalise(s, info); + /* QEMU SMMUv3 supports both linear and 2-level stream tables */ if (FIELD_EX32(info->idr[0], IDR0, STLEVEL) != FIELD_EX32(s->idr[0], IDR0, STLEVEL)) { diff --git a/hw/arm/smmuv3-accel.h b/hw/arm/smmuv3-accel.h index dba6c71de5..3c1cd55714 100644 --- a/hw/arm/smmuv3-accel.h +++ b/hw/arm/smmuv3-accel.h @@ -26,6 +26,8 @@ typedef struct SMMUv3AccelState { uint32_t bypass_hwpt_id; uint32_t abort_hwpt_id; QLIST_HEAD(, SMMUv3AccelDevice) device_list; + bool auto_mode; + bool auto_finalised; } SMMUv3AccelState; typedef struct SMMUS1Hwpt { diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 7fead1c3cf..09ea08eb18 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -37,6 +37,7 @@ #include "smmuv3-accel.h" #include "smmuv3-internal.h" #include "smmu-internal.h" +#include "system/system.h" #define PTW_RECORD_FAULT(ptw_info, cfg) (((ptw_info).stage == SMMU_STAGE_1 && \ (cfg)->record_faults) || \ @@ -2020,6 +2021,22 @@ static bool smmu_validate_property(SMMUv3State *s, Error **errp) return true; } +static void smmuv3_machine_done(Notifier *notifier, void *data) +{ + SMMUv3State *s = container_of(notifier, SMMUv3State, machine_done); + SMMUv3AccelState *accel = s->s_accel; + + if (!s->accel) { + return; + } + + if (accel->auto_mode && !accel->auto_finalised) { + error_report("arm-smmuv3 accel=on with 'auto' properties requires " + "at least one cold-plugged VFIO device"); + exit(1); + } +} + static void smmu_realize(DeviceState *d, Error **errp) { SMMUState *sys = ARM_SMMU(d); @@ -2058,6 +2075,9 @@ static void smmu_realize(DeviceState *d, Error **errp) smmu_init_irq(s, dev); smmuv3_init_id_regs(s); + + s->machine_done.notify = smmuv3_machine_done; + qemu_add_machine_init_done_notifier(&s->machine_done); } static const VMStateDescription vmstate_smmuv3_queue = { diff --git a/include/hw/arm/smmuv3.h b/include/hw/arm/smmuv3.h index 82f18eb090..fe0493c1aa 100644 --- a/include/hw/arm/smmuv3.h +++ b/include/hw/arm/smmuv3.h @@ -74,6 +74,8 @@ struct SMMUv3State { OnOffAuto ats; OasMode oas; SsidSizeMode ssidsize; + + Notifier machine_done; }; typedef enum { -- 2.43.0