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From: Thomas Huth <thuth@redhat.com>
To: Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org
Cc: "Pierrick Bouvier" <pierrick.bouvier@linaro.org>,
	"Michael S. Tsirkin" <mst@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Zhao Liu" <zhao1.liu@intel.com>,
	"Thomas Huth" <thuth@redhat.com>
Subject: [PATCH 07/10] target/i386: Adjust the suffix of the CPU devices to 32-bit/64-bit mode
Date: Thu,  2 Apr 2026 11:51:29 +0200	[thread overview]
Message-ID: <20260402095132.29245-8-thuth@redhat.com> (raw)
In-Reply-To: <20260402095132.29245-1-thuth@redhat.com>

From: Thomas Huth <thuth@redhat.com>

qemu-system-i386 uses the suffix "-i386-cpu" for the CPU devices, while
qemu-system-x86_64 uses the suffix "-x86_64-cpu" instead. For supporting
both targets in one binary, we have to adjust the suffix during runtime.

Signed-off-by: Thomas Huth <thuth@redhat.com>
---
 target/i386/cpu.h      |  3 ++-
 target/i386/cpu.c      | 29 ++++++++++++++++++++++++-----
 target/i386/host-cpu.c |  6 +++++-
 3 files changed, 31 insertions(+), 7 deletions(-)

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 9d71d1dcca7..38309773ea8 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -2775,10 +2775,11 @@ void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7);
 uint64_t cpu_get_tsc(CPUX86State *env);
 
 #define CPU_RESOLVING_TYPE TYPE_X86_CPU
+#define I386_CPU_TYPE_SUFFIX "-i386-cpu"
 
 #ifdef TARGET_X86_64
 #define TARGET_DEFAULT_CPU_TYPE \
-            (target_i386() ? X86_CPU_TYPE_NAME("qemu32") \
+            (target_i386() ? "qemu32" I386_CPU_TYPE_SUFFIX \
                            : X86_CPU_TYPE_NAME("qemu64"))
 #else
 #define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME("qemu32")
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index e30d47831d6..98e03cb9a88 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -2276,7 +2276,11 @@ void host_cpuid(uint32_t function, uint32_t count,
  */
 static char *x86_cpu_type_name(const char *model_name)
 {
-    return g_strdup_printf(X86_CPU_TYPE_NAME("%s"), model_name);
+    if (target_i386()) {
+        return g_strdup_printf("%s" I386_CPU_TYPE_SUFFIX, model_name);
+    } else {
+        return g_strdup_printf(X86_CPU_TYPE_NAME("%s"), model_name);
+    }
 }
 
 static ObjectClass *x86_cpu_class_by_name(const char *cpu_model)
@@ -2288,7 +2292,16 @@ static ObjectClass *x86_cpu_class_by_name(const char *cpu_model)
 static char *x86_cpu_class_get_model_name(X86CPUClass *cc)
 {
     const char *class_name = object_class_get_name(OBJECT_CLASS(cc));
-    assert(g_str_has_suffix(class_name, X86_CPU_TYPE_SUFFIX));
+    const char *type_suffix;
+
+    if (target_i386()) {
+        type_suffix = I386_CPU_TYPE_SUFFIX;
+    } else {
+        type_suffix = X86_CPU_TYPE_SUFFIX;
+    }
+
+    assert(g_str_has_suffix(class_name, type_suffix));
+
     return cpu_model_from_type(class_name);
 }
 
@@ -7266,7 +7279,7 @@ static void max_x86_cpu_initfn(Object *obj)
     }
 }
 
-static const TypeInfo max_x86_cpu_type_info = {
+static TypeInfo max_x86_cpu_type_info = {
     .name = X86_CPU_TYPE_NAME("max"),
     .parent = TYPE_X86_CPU,
     .instance_init = max_x86_cpu_initfn,
@@ -7884,7 +7897,8 @@ static gint x86_cpu_list_compare(gconstpointer a, gconstpointer b, gpointer d)
 
 static GSList *get_sorted_cpu_model_list(void)
 {
-    GSList *list = object_class_get_list(TYPE_X86_CPU, false);
+    GSList *list = object_class_get_list(target_i386() ?
+                                         "i386-cpu" : TYPE_X86_CPU, false);
     list = g_slist_sort_with_data(list, x86_cpu_list_compare, NULL);
     return list;
 }
@@ -10818,7 +10832,7 @@ static void x86_cpu_base_class_init(ObjectClass *oc, const void *data)
     xcc->ordering = 8;
 }
 
-static const TypeInfo x86_base_cpu_type_info = {
+static TypeInfo x86_base_cpu_type_info = {
         .name = X86_CPU_TYPE_NAME("base"),
         .parent = TYPE_X86_CPU,
         .class_init = x86_cpu_base_class_init,
@@ -10832,6 +10846,11 @@ static void x86_cpu_register_types(void)
     for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); i++) {
         x86_register_cpudef_types(&builtin_x86_defs[i]);
     }
+
+    if (target_i386()) {
+        x86_base_cpu_type_info.name = "base" I386_CPU_TYPE_SUFFIX;
+        max_x86_cpu_type_info.name = "max" I386_CPU_TYPE_SUFFIX;
+    }
     type_register_static(&max_x86_cpu_type_info);
     type_register_static(&x86_base_cpu_type_info);
 }
diff --git a/target/i386/host-cpu.c b/target/i386/host-cpu.c
index d5e2bb5e187..a6b8bb484b3 100644
--- a/target/i386/host-cpu.c
+++ b/target/i386/host-cpu.c
@@ -179,7 +179,7 @@ static void host_cpu_class_init(ObjectClass *oc, const void *data)
         g_strdup_printf("processor with all supported host features ");
 }
 
-static const TypeInfo host_cpu_type_info = {
+static TypeInfo host_cpu_type_info = {
     .name = X86_CPU_TYPE_NAME("host"),
     .parent = X86_CPU_TYPE_NAME("max"),
     .class_init = host_cpu_class_init,
@@ -187,6 +187,10 @@ static const TypeInfo host_cpu_type_info = {
 
 static void host_cpu_type_init(void)
 {
+    if (target_i386()) {
+        host_cpu_type_info.name = "host" I386_CPU_TYPE_SUFFIX;
+        host_cpu_type_info.parent = "max" I386_CPU_TYPE_SUFFIX;
+    }
     type_register_static(&host_cpu_type_info);
 }
 
-- 
2.53.0



  parent reply	other threads:[~2026-04-02  9:52 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-02  9:51 [PATCH for-11.1 00/10] Deprecate the qemu-system-i386 binary Thomas Huth
2026-04-02  9:51 ` [PATCH 01/10] target/i386/tcg/sysemu: Move target specific SMM code to separate functions Thomas Huth
2026-04-02  9:51 ` [PATCH 02/10] target/i386/tcg/sysemu: Allow 32-bit SMM code to be used in the 64-bit binary Thomas Huth
2026-04-02  9:51 ` [PATCH 03/10] target-info: Add functions for querying whether the target is i386 or x86_64 Thomas Huth
2026-04-02  9:51 ` [PATCH 04/10] cpu: Add a way to detect 32-bit mode from argv0 Thomas Huth
2026-04-02  9:51 ` [PATCH 05/10] target/i386/cpu: Allow to limit the 64-bit binary to 32-bit mode only Thomas Huth
2026-04-02  9:51 ` [PATCH 06/10] target/i386: Select a 32-bit/64-bit default CPU during runtime Thomas Huth
2026-04-02  9:51 ` Thomas Huth [this message]
2026-04-02  9:51 ` [PATCH 08/10] hw/i386/isapc: Adjust the check for valid CPUs in the isapc machine Thomas Huth
2026-04-02  9:51 ` [PATCH 09/10] target/i386: Support migrating from i386 to x86_64 target Thomas Huth
2026-04-02  9:51 ` [PATCH 10/10] docs/about/deprecated: Deprecate the qemu-system-i386 binary Thomas Huth
2026-04-02 10:06   ` Daniel P. Berrangé
2026-04-02 10:11     ` Thomas Huth
2026-04-02 10:41       ` Daniel P. Berrangé
2026-04-02 10:44         ` Daniel P. Berrangé
2026-04-02 11:20 ` [PATCH for-11.1 00/10] " Peter Maydell
2026-04-02 13:02   ` Thomas Huth
2026-04-02 16:37     ` Daniel P. Berrangé
2026-04-02 16:44       ` Thomas Huth
2026-04-06  4:47   ` Pierrick Bouvier
2026-04-08  7:20     ` Thomas Huth
2026-04-08 15:42       ` Pierrick Bouvier

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