From: sashiko-bot@kernel.org
To: "Pradhan, Sanman" <sanman.pradhan@hpe.com>
Cc: linux-hwmon@vger.kernel.org
Subject: Re: [PATCH v3 3/3] hwmon: (powerz) Fix use-after-free and signal handling on USB disconnect
Date: Wed, 08 Apr 2026 17:58:13 +0000 [thread overview]
Message-ID: <20260408175814.934BFC19421@smtp.kernel.org> (raw)
In-Reply-To: <20260408163029.353777-4-sanman.pradhan@hpe.com>
Sashiko AI review found 1 potential issue(s):
- [Critical] Unsafe DMA buffer allocation resulting in cacheline sharing and memory corruption
--
commit e52b87f2333c018b83f387af6cae9b706448d9b1
Author: Sanman Pradhan <psanman@juniper.net>
hwmon: (powerz) Fix use-after-free and signal handling on USB disconnect
This patch fixes several issues in the powerz driver related to USB disconnect
races and signal handling, including a use-after-free and incorrect return
value checks.
> diff --git a/drivers/hwmon/powerz.c b/drivers/hwmon/powerz.c
> index 4e663d5b4e330..0b38fdf42ddbe 100644
> --- a/drivers/hwmon/powerz.c
> +++ b/drivers/hwmon/powerz.c
[ ... ]
> @@ -241,9 +246,12 @@ static void powerz_disconnect(struct usb_interface *intf)
> {
> struct powerz_priv *priv = usb_get_intfdata(intf);
>
> + usb_set_intfdata(intf, NULL);
> +
> mutex_lock(&priv->mutex);
This isn't a regression introduced by this patch, but is there a pre-existing
cacheline sharing issue between priv->transfer_buffer and priv->mutex?
The transfer_buffer is a 64-byte array embedded at the start of
struct powerz_priv, immediately followed by the mutex and completion:
struct powerz_priv {
char transfer_buffer[64];
...
While devm_kzalloc() guarantees ARCH_DMA_MINALIGN alignment for the start
of the structure, it does not guarantee padding. On architectures where
ARCH_DMA_MINALIGN is greater than 64 bytes (such as 128 bytes on some
ARM64 systems), transfer_buffer and the mutex will share the same CPU
cacheline.
During a USB read, transfer_buffer is mapped for DMA_FROM_DEVICE. When the
transfer finishes, the DMA API invalidates the cacheline. If another CPU
modifies priv->mutex here in powerz_disconnect() concurrently, those
modifications could reside in the CPU's dirty cacheline and be silently
erased by the invalidation.
Does this violate the DMA-API rule that DMA buffers must not share cachelines
with other variables, leading to silent lock state or wait queue corruption?
> usb_kill_urb(priv->urb);
> usb_free_urb(priv->urb);
> + priv->urb = NULL;
> mutex_unlock(&priv->mutex);
> }
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260408163029.353777-1-sanman.pradhan@hpe.com?part=3
next prev parent reply other threads:[~2026-04-08 17:58 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-08 16:30 [PATCH v3 0/3] hwmon: Fix bugs in pt5161l, isl28022, and powerz Pradhan, Sanman
2026-04-08 16:31 ` [PATCH v3 1/3] hwmon: (pt5161l) Fix bugs in pt5161l_read_block_data() Pradhan, Sanman
2026-04-08 17:08 ` sashiko-bot
2026-04-08 17:22 ` Pradhan, Sanman
2026-04-08 18:28 ` Guenter Roeck
2026-04-08 16:31 ` [PATCH v3 2/3] hwmon: (isl28022) Fix integer overflow in power calculation on 32-bit Pradhan, Sanman
2026-04-08 17:28 ` sashiko-bot
2026-04-08 16:31 ` [PATCH v3 3/3] hwmon: (powerz) Fix use-after-free and signal handling on USB disconnect Pradhan, Sanman
2026-04-08 17:58 ` sashiko-bot [this message]
2026-04-08 19:30 ` Thomas Weißschuh
2026-04-09 15:50 ` Pradhan, Sanman
2026-04-09 16:21 ` Thomas Weißschuh
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