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Tsirkin" , Pedro Barbuda , Mohamed Mediouni , Paolo Bonzini , Zhao Liu , Roman Bolshakov , Wei Liu , Phil Dennis-Jordan Subject: [PATCH v11 07/15] whpx: i386: introduce proper cpuid support Date: Mon, 13 Apr 2026 18:52:09 +0200 Message-ID: <20260413165217.47105-8-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260413165217.47105-1-mohamed@unpredictable.fr> References: <20260413165217.47105-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: INMbt5N92POGJfvdNgp0_etOvfUDjD0s X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDEzMDE2NiBTYWx0ZWRfX/5fnR9SszYNG js//wnqLycvu3HCr/GuRJi23BO+SeAOUJHAdQnxBV3AELgUEvyueub1Yr22XvTmg8QF6kKl9ycf KI5UXRUuKLJou8aePU8JrEcRrYqb2i2923jdHF5xpgRwHOV/ni6TizhxuVWbYAY9e7wXXMClLFs 6YKiPlfvTGVFhIrX7brsSgxKphXDDcG/7mLPW31P9RfBzyeel94XWcqTMokURmDtlrJKC4Aso6Q l2Ee/DyOllJreGnCnTicsGuQkp/uhVkz2I1r24GV5CjNGo8gqqNPW0tDxUmoaQ2vpVXKC4+MqHZ hOZqtTTrBlSq67d0qZaYXuuZEFyaPpZunz0qD4crK58AJhyG/5cXiMfo0HySt8= X-Proofpoint-GUID: INMbt5N92POGJfvdNgp0_etOvfUDjD0s X-Authority-Info-Out: v=2.4 cv=DohbOW/+ c=1 sm=1 tr=0 ts=69dd1f74 cx=c_apl:c_pps:t_out a=9OgfyREA4BUYbbCgc0Y0oA==:117 a=9OgfyREA4BUYbbCgc0Y0oA==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=n8cRCUxqL_yedgTzvKUA:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-04-13_03,2026-04-13_04,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 lowpriorityscore=0 clxscore=1030 mlxlogscore=999 adultscore=0 mlxscore=0 spamscore=0 phishscore=0 malwarescore=0 bulkscore=0 suspectscore=0 classifier=spam authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2604130166 Received-SPF: pass client-ip=57.103.69.24; envelope-from=mohamed@unpredictable.fr; helo=outbound.mr.icloud.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Unlike the implementation in QEMU 10.2, this one works. It's not optimal though as it doesn't use the Hyper-V support for this. Signed-off-by: Mohamed Mediouni --- target/i386/whpx/whpx-all.c | 123 ++++++++++++++++++++++++++++++++++-- 1 file changed, 119 insertions(+), 4 deletions(-) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index c2a78312f8..9827c93df1 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -2071,6 +2071,7 @@ int whpx_vcpu_run(CPUState *cpu) WHV_REGISTER_NAME reg_names[5]; UINT32 reg_count = 5; X86CPU *x86_cpu = X86_CPU(cpu); + X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); CPUX86State *env = &x86_cpu->env; reg_names[0] = WHvX64RegisterRip; @@ -2083,7 +2084,15 @@ int whpx_vcpu_run(CPUState *cpu) vcpu->exit_ctx.VpContext.Rip + vcpu->exit_ctx.VpContext.InstructionLength; - if (whpx_is_legacy_os()) { + /* + * On Windows 10 we can't query features from + * the Hyper-V interface. + * + * On Windows 11, if using xcc->max_features + * just pass through what the hypervisor + * provides without any QEMU filtering. + */ + if (whpx_is_legacy_os() || xcc->max_features) { reg_values[1].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRax; reg_values[2].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRcx; reg_values[3].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRdx; @@ -2135,6 +2144,60 @@ int whpx_vcpu_run(CPUState *cpu) } break; } + } else { + switch (vcpu->exit_ctx.CpuidAccess.Rax) { + case 0x40000000: + case 0x40000001: + case 0x40000010: + reg_values[1].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRax; + reg_values[2].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRcx; + reg_values[3].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRdx; + reg_values[4].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRbx; + break; + } + } + + if (vcpu->exit_ctx.CpuidAccess.Rax == 0x1) { + if (cpu_has_x2apic_feature(env)) { + reg_values[2].Reg64 |= CPUID_EXT_X2APIC; + } else { + reg_values[2].Reg32 &= CPUID_EXT_X2APIC; + } + } + + /* Dynamic depending on XCR0 and XSS, so query DefaultResult */ + if (vcpu->exit_ctx.CpuidAccess.Rax == 0x07 + && vcpu->exit_ctx.CpuidAccess.Rcx == 0) { + if (vcpu->exit_ctx.CpuidAccess.DefaultResultRdx + & CPUID_7_0_EDX_CET_IBT) { + reg_values[3].Reg32 |= CPUID_7_0_EDX_CET_IBT; + } else { + reg_values[3].Reg32 &= ~CPUID_7_0_EDX_CET_IBT; + } + + if (vcpu->exit_ctx.CpuidAccess.DefaultResultRcx + & CPUID_7_0_ECX_CET_SHSTK) { + reg_values[2].Reg32 |= CPUID_7_0_ECX_CET_SHSTK; + } else { + reg_values[2].Reg32 &= ~CPUID_7_0_ECX_CET_SHSTK; + } + + if (vcpu->exit_ctx.CpuidAccess.DefaultResultRcx + & CPUID_7_0_ECX_OSPKE) { + reg_values[2].Reg32 |= CPUID_7_0_ECX_OSPKE; + } else { + reg_values[2].Reg32 &= ~CPUID_7_0_ECX_OSPKE; + } + } + + /* OSXSAVE is dynamic. Do this instead of syncing CR4 */ + if (vcpu->exit_ctx.CpuidAccess.Rax == 1) { + if (vcpu->exit_ctx.CpuidAccess.DefaultResultRcx + & CPUID_EXT_OSXSAVE) { + reg_values[2].Reg32 |= CPUID_EXT_OSXSAVE; + } else { + reg_values[2].Reg32 &= ~CPUID_EXT_OSXSAVE; + } } hr = whp_dispatch.WHvSetVirtualProcessorRegisters( @@ -2324,6 +2387,45 @@ error: return ret; } +static void whpx_cpu_xsave_init(void) +{ + static bool first = true; + int i; + + if (!first) { + return; + } + first = false; + + /* x87 and SSE states are in the legacy region of the XSAVE area. */ + x86_ext_save_areas[XSTATE_FP_BIT].offset = 0; + x86_ext_save_areas[XSTATE_SSE_BIT].offset = 0; + + for (i = XSTATE_SSE_BIT + 1; i < XSAVE_STATE_AREA_COUNT; i++) { + ExtSaveArea *esa = &x86_ext_save_areas[i]; + + if (esa->size) { + int sz = whpx_get_supported_cpuid(0xd, i, R_EAX); + if (sz != 0) { + assert(esa->size == sz); + esa->offset = whpx_get_supported_cpuid(0xd, i, R_EBX); + } + } + } +} + +static void whpx_cpu_max_instance_init(X86CPU *cpu) +{ + CPUX86State *env = &cpu->env; + + env->cpuid_min_level = + whpx_get_supported_cpuid(0x0, 0, R_EAX); + env->cpuid_min_xlevel = + whpx_get_supported_cpuid(0x80000000, 0, R_EAX); + env->cpuid_min_xlevel2 = + whpx_get_supported_cpuid(0xC0000000, 0, R_EAX); +} + static PropValue whpx_default_props[] = { { "x2apic", "on" }, { NULL, NULL }, @@ -2333,9 +2435,18 @@ static PropValue whpx_default_props[] = { void whpx_cpu_instance_init(CPUState *cs) { X86CPU *cpu = X86_CPU(cs); + X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu); host_cpu_instance_init(cpu); x86_cpu_apply_props(cpu, whpx_default_props); + + if (!whpx_is_legacy_os() && xcc->max_features) { + whpx_cpu_max_instance_init(cpu); + } + + if (!whpx_is_legacy_os()) { + whpx_cpu_xsave_init(); + } } /* @@ -2353,8 +2464,12 @@ int whpx_accel_init(AccelState *as, MachineState *ms) WHV_CAPABILITY_FEATURES features = {0}; WHV_PROCESSOR_FEATURES_BANKS processor_features; WHV_PROCESSOR_PERFMON_FEATURES perfmon_features; - UINT32 cpuidExitList[] = {1}; - UINT32 cpuidExitList_nohyperv[] = {1, 0x40000000, 0x40000001, 0x40000010}; + + UINT32 cpuidExitList[] = {0x0, 0x1, 0x6, 0x7, 0x14, 0x24, 0x29, 0x1E, + 0x40000000, 0x40000001, 0x40000010, 0x80000000, 0x80000001, + 0x80000002, 0x80000003, 0x80000004, 0x80000007, 0x80000008, + 0x8000000A, 0x80000021, 0x80000022, 0xC0000000, 0xC0000001}; + UINT32 cpuidExitList_legacy_os[] = {1, 0x40000000, 0x40000001, 0x40000010}; whpx = &whpx_global; @@ -2610,7 +2725,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms) hr = whp_dispatch.WHvSetPartitionProperty( whpx->partition, WHvPartitionPropertyCodeCpuidExitList, - whpx->hyperv_enlightenments_enabled ? cpuidExitList : cpuidExitList_nohyperv, + !whpx_is_legacy_os() ? cpuidExitList : cpuidExitList_legacy_os, RTL_NUMBER_OF(cpuidExitList) * sizeof(UINT32)); if (FAILED(hr)) { -- 2.50.1 (Apple Git-155)