[PATCH v3 0/3] drm/xe/pat: Type cleanup and invalid index hardening

[Xin Wang <x.wang@intel.com>]

Small follow-up series to harden the PAT subsystem:

Patch 1 fixes two remaining spots where pat_index was typed as u32/int
instead of u16, aligning with the rest of the driver.

Patch 2 defaults XE_CACHE_NONE_COMPRESSION to XE_PAT_INVALID_IDX (like
WB_COMPRESSION already does).

Patch 3 introduces xe_cache_pat_idx(), an inline helper that validates
cache_mode bounds and checks for XE_PAT_INVALID_IDX before returning the
PAT index.  All 20 pat.idx[] read sites across the driver are converted.

Suggested-by: Matthew Auld <matthew.auld@intel.com>

v3:
- Rebased on latest drm-tip

v2:
- Dropped xe_assert() guards from xe_migrate that were added in v1 patch 2;
  the new helper in patch 3 now provides the same coverage uniformly across
  all call sites (Matthew Auld)
- New patch 3: xe_cache_pat_idx() helper with xe_assert() for every
  pat.idx[] read access, including bounds check on cache_mode

Xin Wang (3):
  drm/xe: Standardize pat_index to u16 type
  drm/xe/pat: Default XE_CACHE_NONE_COMPRESSION to invalid
  drm/xe/pat: Introduce xe_cache_pat_idx() helper

 drivers/gpu/drm/xe/display/xe_fb_pin.c | 11 ++++++-----
 drivers/gpu/drm/xe/tests/xe_migrate.c  |  3 ++-
 drivers/gpu/drm/xe/xe_device_types.h   |  2 +-
 drivers/gpu/drm/xe/xe_ggtt.c           |  7 ++++---
 drivers/gpu/drm/xe/xe_migrate.c        | 15 ++++++++-------
 drivers/gpu/drm/xe/xe_pat.c            |  1 +
 drivers/gpu/drm/xe/xe_pat.h            | 24 +++++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_pt.c             |  3 ++-
 drivers/gpu/drm/xe/xe_vm.c             |  8 ++++----
 9 files changed, 51 insertions(+), 23 deletions(-)

-- 
2.43.0