From: kernel test robot <lkp@intel.com>
To: Siddharth Vadapalli <s-vadapalli@ti.com>
Cc: oe-kbuild-all@lists.linux.dev, linux-pci@vger.kernel.org,
Manivannan Sadhasivam <mani@kernel.org>,
Arnd Bergmann <arnd@arndb.de>
Subject: [pci:controller/cadence-j721e 1/1] arch/powerpc/boot/treeboot-akebono.c:57:9: error: invalid instruction, did you mean: mfcr, mfdccr, mfdcr, mfdscr?
Date: Wed, 15 Apr 2026 20:59:11 +0800 [thread overview]
Message-ID: <202604152040.H4DRQF1s-lkp@intel.com> (raw)
Hi Siddharth,
First bad commit (maybe != root cause):
tree: https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git controller/cadence-j721e
head: 4b361b1e92be255ff923453fe8db74086cc7cf66
commit: 4b361b1e92be255ff923453fe8db74086cc7cf66 [1/1] PCI: j721e: Add config guards for Cadence Host and Endpoint library APIs
config: powerpc-randconfig-r071-20260412 (https://download.01.org/0day-ci/archive/20260415/202604152040.H4DRQF1s-lkp@intel.com/config)
compiler: clang version 23.0.0git (https://github.com/llvm/llvm-project ae825cb8cea7f3ac8e5e4096f22713845cf5e501)
smatch: v0.5.0-9007-gcf3ea02b
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260415/202604152040.H4DRQF1s-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202604152040.H4DRQF1s-lkp@intel.com/
All errors (new ones prefixed by >>):
>> arch/powerpc/boot/treeboot-akebono.c:57:9: error: invalid instruction, did you mean: mfcr, mfdccr, mfdcr, mfdscr?
57 | reg = mfdcrx(DDR3_MR0CF + i);
| ^
arch/powerpc/boot/dcr.h:16:16: note: expanded from macro 'mfdcrx'
16 | asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | mfdcrx 4,6
| ^~~~~~
>> arch/powerpc/boot/treeboot-akebono.c:57:9: error: invalid instruction, did you mean: mfcr, mfdccr, mfdcr, mfdscr?
57 | reg = mfdcrx(DDR3_MR0CF + i);
| ^
arch/powerpc/boot/dcr.h:16:16: note: expanded from macro 'mfdcrx'
16 | asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | mfdcrx 8,8
| ^~~~~~
>> arch/powerpc/boot/treeboot-akebono.c:57:9: error: invalid instruction, did you mean: mfcr, mfdccr, mfdcr, mfdscr?
57 | reg = mfdcrx(DDR3_MR0CF + i);
| ^
arch/powerpc/boot/dcr.h:16:16: note: expanded from macro 'mfdcrx'
16 | asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | mfdcrx 3,3
| ^~~~~~
>> arch/powerpc/boot/treeboot-akebono.c:57:9: error: invalid instruction, did you mean: mfcr, mfdccr, mfdcr, mfdscr?
57 | reg = mfdcrx(DDR3_MR0CF + i);
| ^
arch/powerpc/boot/dcr.h:16:16: note: expanded from macro 'mfdcrx'
16 | asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | mfdcrx 3,3
| ^~~~~~
>> arch/powerpc/boot/treeboot-akebono.c:78:2: error: invalid instruction, did you mean: mtcr, mtdccr, mtdcr, mtdscr?
78 | mtdcrx(CCTL0_MCO4, 0x1);
| ^
arch/powerpc/boot/dcr.h:21:16: note: expanded from macro 'mtdcrx'
21 | asm volatile("mtdcrx %0,%1" : : "r"(rn), "r" (val)); \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | mtdcrx 4,5
| ^~~~~~
arch/powerpc/boot/treeboot-akebono.c:81:8: error: invalid instruction, did you mean: mfcr, mfdccr, mfdcr, mfdscr?
81 | reg = mfdcrx(CCTL0_MCO2) & ~0x2;
| ^
arch/powerpc/boot/dcr.h:16:16: note: expanded from macro 'mfdcrx'
16 | asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | mfdcrx 4,3
| ^~~~~~
arch/powerpc/boot/treeboot-akebono.c:82:2: error: invalid instruction, did you mean: mtcr, mtdccr, mtdcr, mtdscr?
82 | mtdcrx(CCTL0_MCO2, reg);
| ^
arch/powerpc/boot/dcr.h:21:16: note: expanded from macro 'mtdcrx'
21 | asm volatile("mtdcrx %0,%1" : : "r"(rn), "r" (val)); \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | mtdcrx 3,4
| ^~~~~~
7 errors generated.
--
>> arch/powerpc/boot/treeboot-currituck.c:46:9: error: invalid instruction, did you mean: mfcr, mfdccr, mfdcr, mfdscr?
46 | reg = mfdcrx(DDR3_MR0CF + i);
| ^
arch/powerpc/boot/dcr.h:16:16: note: expanded from macro 'mfdcrx'
16 | asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | mfdcrx 4,4
| ^~~~~~
>> arch/powerpc/boot/treeboot-currituck.c:46:9: error: invalid instruction, did you mean: mfcr, mfdccr, mfdcr, mfdscr?
46 | reg = mfdcrx(DDR3_MR0CF + i);
| ^
arch/powerpc/boot/dcr.h:16:16: note: expanded from macro 'mfdcrx'
16 | asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | mfdcrx 8,8
| ^~~~~~
>> arch/powerpc/boot/treeboot-currituck.c:46:9: error: invalid instruction, did you mean: mfcr, mfdccr, mfdcr, mfdscr?
46 | reg = mfdcrx(DDR3_MR0CF + i);
| ^
arch/powerpc/boot/dcr.h:16:16: note: expanded from macro 'mfdcrx'
16 | asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | mfdcrx 3,3
| ^~~~~~
>> arch/powerpc/boot/treeboot-currituck.c:46:9: error: invalid instruction, did you mean: mfcr, mfdccr, mfdcr, mfdscr?
46 | reg = mfdcrx(DDR3_MR0CF + i);
| ^
arch/powerpc/boot/dcr.h:16:16: note: expanded from macro 'mfdcrx'
16 | asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
| ^
<inline asm>:1:2: note: instantiated into assembly here
1 | mfdcrx 3,3
| ^~~~~~
4 errors generated.
vim +57 arch/powerpc/boot/treeboot-akebono.c
2a2c74b2efcb1a Alistair Popple 2014-03-06 49
2a2c74b2efcb1a Alistair Popple 2014-03-06 50 static unsigned long long ibm_akebono_detect_memsize(void)
2a2c74b2efcb1a Alistair Popple 2014-03-06 51 {
2a2c74b2efcb1a Alistair Popple 2014-03-06 52 u32 reg;
2a2c74b2efcb1a Alistair Popple 2014-03-06 53 unsigned i;
2a2c74b2efcb1a Alistair Popple 2014-03-06 54 unsigned long long memsize = 0;
2a2c74b2efcb1a Alistair Popple 2014-03-06 55
2a2c74b2efcb1a Alistair Popple 2014-03-06 56 for (i = 0; i < MAX_RANKS; i++) {
2a2c74b2efcb1a Alistair Popple 2014-03-06 @57 reg = mfdcrx(DDR3_MR0CF + i);
2a2c74b2efcb1a Alistair Popple 2014-03-06 58
2a2c74b2efcb1a Alistair Popple 2014-03-06 59 if (!(reg & 1))
2a2c74b2efcb1a Alistair Popple 2014-03-06 60 continue;
2a2c74b2efcb1a Alistair Popple 2014-03-06 61
2a2c74b2efcb1a Alistair Popple 2014-03-06 62 reg &= 0x0000f000;
2a2c74b2efcb1a Alistair Popple 2014-03-06 63 reg >>= 12;
2a2c74b2efcb1a Alistair Popple 2014-03-06 64 memsize += (0x800000ULL << reg);
2a2c74b2efcb1a Alistair Popple 2014-03-06 65 }
2a2c74b2efcb1a Alistair Popple 2014-03-06 66
2a2c74b2efcb1a Alistair Popple 2014-03-06 67 return memsize;
2a2c74b2efcb1a Alistair Popple 2014-03-06 68 }
2a2c74b2efcb1a Alistair Popple 2014-03-06 69
2a2c74b2efcb1a Alistair Popple 2014-03-06 70 static void ibm_akebono_fixups(void)
2a2c74b2efcb1a Alistair Popple 2014-03-06 71 {
2a2c74b2efcb1a Alistair Popple 2014-03-06 72 void *emac;
2a2c74b2efcb1a Alistair Popple 2014-03-06 73 u32 reg;
2a2c74b2efcb1a Alistair Popple 2014-03-06 74
2a2c74b2efcb1a Alistair Popple 2014-03-06 75 dt_fixup_memory(0x0ULL, ibm_akebono_memsize);
2a2c74b2efcb1a Alistair Popple 2014-03-06 76
2a2c74b2efcb1a Alistair Popple 2014-03-06 77 /* Fixup the SD timeout frequency */
2a2c74b2efcb1a Alistair Popple 2014-03-06 @78 mtdcrx(CCTL0_MCO4, 0x1);
2a2c74b2efcb1a Alistair Popple 2014-03-06 79
2a2c74b2efcb1a Alistair Popple 2014-03-06 80 /* Disable SD high-speed mode (which seems to be broken) */
2a2c74b2efcb1a Alistair Popple 2014-03-06 81 reg = mfdcrx(CCTL0_MCO2) & ~0x2;
2a2c74b2efcb1a Alistair Popple 2014-03-06 82 mtdcrx(CCTL0_MCO2, reg);
2a2c74b2efcb1a Alistair Popple 2014-03-06 83
2a2c74b2efcb1a Alistair Popple 2014-03-06 84 /* Set the MAC address */
2a2c74b2efcb1a Alistair Popple 2014-03-06 85 emac = finddevice("/plb/opb/ethernet");
2a2c74b2efcb1a Alistair Popple 2014-03-06 86 if (emac > 0) {
2a2c74b2efcb1a Alistair Popple 2014-03-06 87 if (mac_addr)
2a2c74b2efcb1a Alistair Popple 2014-03-06 88 setprop(emac, "local-mac-address",
2a2c74b2efcb1a Alistair Popple 2014-03-06 89 ((u8 *) &mac_addr) + 2 , 6);
2a2c74b2efcb1a Alistair Popple 2014-03-06 90 }
2a2c74b2efcb1a Alistair Popple 2014-03-06 91 }
2a2c74b2efcb1a Alistair Popple 2014-03-06 92
:::::: The code at line 57 was first introduced by commit
:::::: 2a2c74b2efcb1a0ca3fdcb5fbb96ad8de6a29177 IBM Akebono: Add the Akebono platform
:::::: TO: Alistair Popple <alistair@popple.id.au>
:::::: CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki
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