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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-488fc1393f5sm437715325e9.9.2026.04.22.13.01.28 for (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 22 Apr 2026 13:01:28 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 31/48] docs/specs/tpm: document PPI support on ARM64 virt Date: Wed, 22 Apr 2026 21:57:29 +0200 Message-ID: <20260422195746.88865-32-philmd@linaro.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260422195746.88865-1-philmd@linaro.org> References: <20260422195746.88865-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mohammadfaiz Bawa Document that tpm-tis-device on the ARM virt machine supports PPI with dynamically allocated MMIO via the platform bus, unlike x86 where PPI is at the fixed address 0xFED45000. Also add hw/arm/virt-acpi-build.c and hw/acpi/tpm.c to the list of files related to TPM ACPI tables. Reviewed-by: Stefan Berger Signed-off-by: Mohammadfaiz Bawa Message-ID: <20260327173209.148180-2-mbawa@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- docs/specs/tpm.rst | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/docs/specs/tpm.rst b/docs/specs/tpm.rst index b630a351b4f..ba2b0d72674 100644 --- a/docs/specs/tpm.rst +++ b/docs/specs/tpm.rst @@ -187,8 +187,32 @@ The location of the table is given by the fw_cfg ``tpmppi_address`` field. The PPI memory region size is 0x400 (``TPM_PPI_ADDR_SIZE``) to leave enough room for future updates. +PPI on ARM64 virt +----------------- + +The ARM virt machine supports PPI for ``tpm-tis-device`` as defined +in the `PPI specification`_. + +Unlike the x86 TIS device where the PPI memory region is mapped at +the fixed address ``0xFED45000`` (within the TIS MMIO range), the +ARM64 sysbus device registers PPI memory as a second MMIO region +on the platform bus. The platform bus assigns the guest physical +address dynamically at device plug time. The ACPI ``_DSM`` method +and PPI operation regions reference this dynamically resolved +address. + +PPI is controlled by the ``ppi`` property (default ``on``):: + + -device tpm-tis-device,tpmdev=tpm0,ppi=on + +Without PPI, guest operating systems such as Windows 11 +ARM64 will log errors when attempting to query TPM Physical +Presence capabilities via the ACPI ``_DSM`` method. + QEMU files related to TPM ACPI tables: - ``hw/i386/acpi-build.c`` + - ``hw/arm/virt-acpi-build.c`` + - ``hw/acpi/tpm.c`` - ``include/hw/acpi/tpm.h`` TPM backend devices -- 2.53.0