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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-489fec8f7cbsm199243925e9.11.2026.04.22.13.01.36 for (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Wed, 22 Apr 2026 13:01:36 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 32/48] hw/acpi/tpm: parameterize PPI base address in tpm_build_ppi_acpi Date: Wed, 22 Apr 2026 21:57:30 +0200 Message-ID: <20260422195746.88865-33-philmd@linaro.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260422195746.88865-1-philmd@linaro.org> References: <20260422195746.88865-1-philmd@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Mohammadfaiz Bawa Add a ppi_base parameter to tpm_build_ppi_acpi() instead of hardcoding TPM_PPI_ADDR_BASE. This prepares for ARM64 support where PPI memory is dynamically allocated by the platform bus and the address is not known at compile time. Update the x86 callers (ISA TIS and CRB) to pass TPM_PPI_ADDR_BASE explicitly. No behavioral change. Reviewed-by: Stefan Berger Signed-off-by: Mohammadfaiz Bawa Reviewed-by: Philippe Mathieu-Daudé Message-ID: <20260327173209.148180-3-mbawa@redhat.com> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/acpi/tpm.h | 3 ++- hw/acpi/tpm.c | 8 ++++---- hw/i386/acpi-build.c | 2 +- hw/tpm/tpm_tis_isa.c | 2 +- 4 files changed, 8 insertions(+), 7 deletions(-) diff --git a/include/hw/acpi/tpm.h b/include/hw/acpi/tpm.h index d2bf6637c54..2ab186a7455 100644 --- a/include/hw/acpi/tpm.h +++ b/include/hw/acpi/tpm.h @@ -20,6 +20,7 @@ #include "hw/core/registerfields.h" #include "hw/acpi/aml-build.h" #include "system/tpm.h" +#include "exec/hwaddr.h" #ifdef CONFIG_TPM @@ -250,7 +251,7 @@ REG32(CRB_DATA_BUFFER, 0x80) */ #define TPM_I2C_INT_ENABLE_MASK 0x0 -void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev); +void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev, hwaddr ppi_base); #endif /* CONFIG_TPM */ diff --git a/hw/acpi/tpm.c b/hw/acpi/tpm.c index 5fe95f2e3f1..e703775984a 100644 --- a/hw/acpi/tpm.c +++ b/hw/acpi/tpm.c @@ -20,7 +20,7 @@ #include "qapi/error.h" #include "hw/acpi/tpm.h" -void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) +void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev, hwaddr ppi_base) { Aml *method, *field, *ifctx, *ifctx2, *ifctx3, *func_mask, *not_implemented, *pak, *tpm2, *tpm3, *pprm, *pprq, *zero, *one; @@ -40,7 +40,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) */ aml_append(dev, aml_operation_region("TPP2", AML_SYSTEM_MEMORY, - aml_int(TPM_PPI_ADDR_BASE + 0x100), + aml_int(ppi_base + 0x100), 0x5A)); field = aml_field("TPP2", AML_ANY_ACC, AML_NOLOCK, AML_PRESERVE); aml_append(field, aml_named_field("PPIN", 8)); @@ -56,7 +56,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) aml_append(dev, aml_operation_region( "TPP3", AML_SYSTEM_MEMORY, - aml_int(TPM_PPI_ADDR_BASE + + aml_int(ppi_base + 0x15a /* movv, docs/specs/tpm.rst */), 0x1)); field = aml_field("TPP3", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE); @@ -78,7 +78,7 @@ void tpm_build_ppi_acpi(TPMIf *tpm, Aml *dev) aml_append(method, aml_operation_region("TPP1", AML_SYSTEM_MEMORY, - aml_add(aml_int(TPM_PPI_ADDR_BASE), op, NULL), 0x1)); + aml_add(aml_int(ppi_base), op, NULL), 0x1)); field = aml_field("TPP1", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE); aml_append(field, aml_named_field("TPPF", 8)); aml_append(method, field); diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 4f01e2c476e..0d7c83d5e96 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1219,7 +1219,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dev, aml_name_decl("_STA", aml_int(0xf))); aml_append(dev, aml_name_decl("_UID", aml_int(1))); - tpm_build_ppi_acpi(tpm, dev); + tpm_build_ppi_acpi(tpm, dev, TPM_PPI_ADDR_BASE); aml_append(sb_scope, dev); } diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c index 1ca403241de..2b1267133ac 100644 --- a/hw/tpm/tpm_tis_isa.c +++ b/hw/tpm/tpm_tis_isa.c @@ -159,7 +159,7 @@ static void build_tpm_tis_isa_aml(AcpiDevAmlIf *adev, Aml *scope) */ /* aml_append(crs, aml_irq_no_flags(isadev->state.irq_num)); */ aml_append(dev, aml_name_decl("_CRS", crs)); - tpm_build_ppi_acpi(ti, dev); + tpm_build_ppi_acpi(ti, dev, TPM_PPI_ADDR_BASE); aml_append(scope, dev); } -- 2.53.0