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Tsirkin" , Wei Liu , Phil Dennis-Jordan , Peter Maydell , Zhao Liu , Paolo Bonzini Subject: [PATCH v3 09/37] whpx: i386: use WHvX64RegisterCr8 only when kernel-irqchip=off Date: Wed, 22 Apr 2026 23:41:57 +0200 Message-ID: <20260422214225.2242-10-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260422214225.2242-1-mohamed@unpredictable.fr> References: <20260422214225.2242-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: Z5xbyGaJV_Pcac9j1vRLLqbhhM1-6Ptm X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIyMDIxMSBTYWx0ZWRfX1cBEdaCOIBYI eFHc9mYgGClgsMvCEs8kl8TlAmJrihicnPiqjpEf82VCBYRNEqWAcmjVfFcLpStA8Udm0kF6wvW WeRznUely+ou/1QLaeUabqA4T9t9aGYx0eZ7b7LY27WOsip/gZSM/9+x3Zns0eDs2eWljTXvwOB nfKpXOyqBvQBjNntsBjt7ObET6JRi8pjjt0az3d6fuo3p11eOr/pGFJu31yjIdXFcC3P7JtfJDS vu/ZV+eVp+FdWmno+Y2WITWiuWUgfpehT5w16BrvE/fPUPF9nBV3BuizdPMQ7bDH6ERoC9qsq+H +flNOQVWZk7CRG8w6ePvq6EpJrPEn+Zp2TaLoT8t+KCShfjkeKxVYlgSoCE3z0= X-Authority-Info-Out: v=2.4 cv=Kf/fcAYD c=1 sm=1 tr=0 ts=69e940d8 cx=c_apl:c_pps:t_out a=YrL12D//S6tul8v/L+6tKg==:117 a=YrL12D//S6tul8v/L+6tKg==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=CtoYo02lv3ougeLbNZoA:9 X-Proofpoint-GUID: Z5xbyGaJV_Pcac9j1vRLLqbhhM1-6Ptm Received-SPF: pass client-ip=57.103.76.113; envelope-from=mohamed@unpredictable.fr; helo=outbound.st.icloud.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org When kernel-irqchip=on, manage TPR as part of the APIC state instead entirely. This fixes some failure to set state errors. Signed-off-by: Mohamed Mediouni --- target/i386/whpx/whpx-all.c | 37 ++++++++++++++++++++++--------------- 1 file changed, 22 insertions(+), 15 deletions(-) diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c index d470c5b9d3..03c146dfb8 100644 --- a/target/i386/whpx/whpx-all.c +++ b/target/i386/whpx/whpx-all.c @@ -95,7 +95,6 @@ static const WHV_REGISTER_NAME whpx_register_names[] = { WHvX64RegisterCr2, WHvX64RegisterCr3, WHvX64RegisterCr4, - WHvX64RegisterCr8, /* X64 Debug Registers */ /* @@ -478,8 +477,11 @@ void whpx_set_registers(CPUState *cpu, WHPXStateLevel level) vcxt.values[idx++].Reg64 = env->cr[3]; assert(whpx_register_names[idx] == WHvX64RegisterCr4); vcxt.values[idx++].Reg64 = env->cr[4]; - assert(whpx_register_names[idx] == WHvX64RegisterCr8); - vcxt.values[idx++].Reg64 = vcpu->tpr; + /* For kernel-irqchip=on, TPR is managed as part of APIC state */ + if (!whpx_irqchip_in_kernel()) { + WHV_REGISTER_VALUE cr8 = {.Reg64 = vcpu->tpr}; + whpx_set_reg(cpu, WHvX64RegisterCr8, cr8); + } /* 8 Debug Registers - Skipped */ @@ -735,11 +737,14 @@ void whpx_get_registers(CPUState *cpu, WHPXStateLevel level) env->cr[3] = vcxt.values[idx++].Reg64; assert(whpx_register_names[idx] == WHvX64RegisterCr4); env->cr[4] = vcxt.values[idx++].Reg64; - assert(whpx_register_names[idx] == WHvX64RegisterCr8); - tpr = vcxt.values[idx++].Reg64; - if (tpr != vcpu->tpr) { - vcpu->tpr = tpr; - cpu_set_apic_tpr(x86_cpu->apic_state, tpr); + + /* For kernel-irqchip=on, TPR is managed as part of APIC state */ + if (!whpx_irqchip_in_kernel()) { + tpr = vcpu->exit_ctx.VpContext.Cr8; + if (tpr != vcpu->tpr) { + vcpu->tpr = tpr; + cpu_set_apic_tpr(x86_cpu->apic_state, tpr); + } } /* 8 Debug Registers - Skipped */ @@ -1745,7 +1750,7 @@ static void whpx_vcpu_pre_run(CPUState *cpu) /* Sync the TPR to the CR8 if was modified during the intercept */ tpr = cpu_get_apic_tpr(x86_cpu->apic_state); - if (tpr != vcpu->tpr) { + if (!whpx_irqchip_in_kernel() && tpr != vcpu->tpr) { vcpu->tpr = tpr; reg_values[reg_count].Reg64 = tpr; qatomic_set(&cpu->exit_request, true); @@ -1787,12 +1792,14 @@ static void whpx_vcpu_post_run(CPUState *cpu) env->eflags = vcpu->exit_ctx.VpContext.Rflags; - uint64_t tpr = vcpu->exit_ctx.VpContext.Cr8; - if (vcpu->tpr != tpr) { - vcpu->tpr = tpr; - bql_lock(); - cpu_set_apic_tpr(x86_cpu->apic_state, vcpu->tpr); - bql_unlock(); + if (!whpx_irqchip_in_kernel()) { + uint64_t tpr = vcpu->exit_ctx.VpContext.Cr8; + if (vcpu->tpr != tpr) { + vcpu->tpr = tpr; + bql_lock(); + cpu_set_apic_tpr(x86_cpu->apic_state, vcpu->tpr); + bql_unlock(); + } } vcpu->interruption_pending = -- 2.50.1 (Apple Git-155)