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Tsirkin" , Wei Liu , Phil Dennis-Jordan , Peter Maydell , Zhao Liu , Paolo Bonzini Subject: [PATCH v3 21/37] target: i386: HLT type that ignores EFLAGS.IF Date: Wed, 22 Apr 2026 23:42:09 +0200 Message-ID: <20260422214225.2242-22-mohamed@unpredictable.fr> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260422214225.2242-1-mohamed@unpredictable.fr> References: <20260422214225.2242-1-mohamed@unpredictable.fr> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-GUID: BHPSpsv3qBW1sJYK9f2_SKrs0OeWjJne X-Proofpoint-ORIG-GUID: BHPSpsv3qBW1sJYK9f2_SKrs0OeWjJne X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNDIyMDIxMSBTYWx0ZWRfX4qudecbySQhS QxlYlP1JAKeIKhYUPwqKmAxp/CTEJVo3/IwOsHQkMQ6fy131oe3+/UalulsdRxxdVomaPv9p2jJ cWdPJg9yInlqDcUT8DXQ2SDUxv7mrOU2MXnwvk9B4AmYlTpdtcae2KiRzjzVI9Afki2//nfdg1R 10KeyxmEgq3evLucMBbFfwiGNo4zCNHxixTVgbS+kJLwOdHyLu0vWqm8OfJlL25MibrNEmIY/2t 1g2gnwH3FvulMYBqqLbqG5BNzNBeMchNTtotcY63XeQ4/TOu97nJTRIHJWMbUcT8rJ8gVND8QgJ TLBbdbnwTQi4TemNlIHP+i7WMWg91hVAMzM0QjWrU87LBEthxGh9Tup+tN5msM= X-Authority-Info-Out: v=2.4 cv=b7e/I9Gx c=1 sm=1 tr=0 ts=69e940ee cx=c_apl:c_pps:t_out a=YrL12D//S6tul8v/L+6tKg==:117 a=YrL12D//S6tul8v/L+6tKg==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=ZtXhj7NgbhMgH__AbsQA:9 Received-SPF: pass client-ip=57.103.76.53; envelope-from=mohamed@unpredictable.fr; helo=outbound.st.icloud.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org The TLFS says: > A partition which possesses the AccessGuestIdleMsr privilege may trigger > entry into the virtual processor idle sleep state through a read to the > hypervisor-defined MSR HV_X64_MSR_GUEST_IDLE. The virtual processor will > be woken when an interrupt arrives, regardless of whether the interrupt > is enabled on the virtual processor or not. Meanwhile, Windows 24H2+ calls this MSR anyway without the privilege being set. Add the infrastructure to support it on the generic QEMU side. Signed-off-by: Mohamed Mediouni --- target/i386/cpu.c | 10 ++++++---- target/i386/cpu.h | 2 ++ 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index a5f1a1a8fd..c9ed9b7580 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -10474,13 +10474,15 @@ int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request) (((env->hflags2 & HF2_VINTR_MASK) && (env->hflags2 & HF2_HIF_MASK)) || (!(env->hflags2 & HF2_VINTR_MASK) && - (env->eflags & IF_MASK && - !(env->hflags & HF_INHIBIT_IRQ_MASK))))) { + ((env->eflags & IF_MASK && + !(env->hflags & HF_INHIBIT_IRQ_MASK)) + || env->hflags2 & HF2_HYPERV_HLT_MASK)))) { return CPU_INTERRUPT_HARD; } else if (env->hflags2 & HF2_VGIF_MASK) { if((interrupt_request & CPU_INTERRUPT_VIRQ) && - (env->eflags & IF_MASK) && - !(env->hflags & HF_INHIBIT_IRQ_MASK)) { + ((env->eflags & IF_MASK && + !(env->hflags & HF_INHIBIT_IRQ_MASK)) + || env->hflags2 & HF2_HYPERV_HLT_MASK)) { return CPU_INTERRUPT_VIRQ; } } diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 0b539155c4..67f508dc10 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -225,6 +225,7 @@ typedef enum X86Seg { #define HF2_NPT_SHIFT 6 /* Nested Paging enabled */ #define HF2_IGNNE_SHIFT 7 /* Ignore CR0.NE=0 */ #define HF2_VGIF_SHIFT 8 /* Can take VIRQ*/ +#define HF2_HYPERV_HLT_SHIFT 9 /* Hyper-V HV_X64_MSR_GUEST_IDLE */ #define HF2_GIF_MASK (1 << HF2_GIF_SHIFT) #define HF2_HIF_MASK (1 << HF2_HIF_SHIFT) @@ -235,6 +236,7 @@ typedef enum X86Seg { #define HF2_NPT_MASK (1 << HF2_NPT_SHIFT) #define HF2_IGNNE_MASK (1 << HF2_IGNNE_SHIFT) #define HF2_VGIF_MASK (1 << HF2_VGIF_SHIFT) +#define HF2_HYPERV_HLT_MASK (1 << HF2_HYPERV_HLT_SHIFT) #define CR0_PE_SHIFT 0 #define CR0_MP_SHIFT 1 -- 2.50.1 (Apple Git-155)