From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE906311967 for ; Thu, 23 Apr 2026 17:17:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776964643; cv=none; b=HQ5Z34PLn1Ev0PodXs7tKl/Biv/2LfCit+OmQy/aAbuOG6RfPHX5dRD61ClfDxI8aKNwy4qQ+fmx3D91z5seBimrh1YDRR0g9k1AzsjCh8q3mhs6JmI7ahX0fKwzk9NQXMUHgqdW0BRmP6xztpYPDIpZqANpQIbdAyUAtcm1YSU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1776964643; c=relaxed/simple; bh=xMcSJcYeTwArhxOiQFbVoqUMGGyqaYWkPXhIL6AzX5I=; h=Date:To:From:Subject:Message-Id; b=RmMS+RRZTeQbvKTU9NIDU4uyQKprIDqS575kLQkTH7JumCFGbESd27NdHvpAovfR+PqZFGde/z6Qfo37BhJhiLh9AaWl3/xtaX3wzlce+ilQmBlVF2d4Es5+9HKYDO7wWZtkrRrXh0vdvO9zq4jnaMNoK1d0gK/+9SsASscSg1M= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux-foundation.org header.i=@linux-foundation.org header.b=HOVBR7sh; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux-foundation.org header.i=@linux-foundation.org header.b="HOVBR7sh" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 85F6EC2BCAF; Thu, 23 Apr 2026 17:17:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linux-foundation.org; s=korg; t=1776964643; bh=xMcSJcYeTwArhxOiQFbVoqUMGGyqaYWkPXhIL6AzX5I=; h=Date:To:From:Subject:From; b=HOVBR7shTWV6qnpTE3z2tFb/HHNmUwpGDhRaU5Z5CN+DE675vaJ5GFJlYudVIkQPA Rvip7KJv08lfbCzZtL+3Gm4reeLyxEVQJXquLlJp2hlXLWPm5TvjeS9syKwSkxKe2I sxrBsvh8+q7x3C1mgSplRwsPt+HXhDx2Rd9DG2Z8= Date: Thu, 23 Apr 2026 10:17:22 -0700 To: mm-commits@vger.kernel.org,will@kernel.org,rafael@kernel.org,peterz@infradead.org,mingo@kernel.org,memxor@gmail.com,mark.rutland@arm.com,konradybcio@kernel.org,harisokn@amazon.com,gary@garyguo.net,davidgow@google.com,daniel.lezcano@linaro.org,cl@linux.com,catalin.marinas@arm.com,boqun@kernel.org,boqun.feng@gmail.com,ast@kernel.org,arnd@arndb.de,andersson@kernel.org,ankur.a.arora@oracle.com,akpm@linux-foundation.org From: Andrew Morton Subject: + arm64-support-wfet-in-smp_cond_load_relaxed_timeout.patch added to mm-new branch Message-Id: <20260423171723.85F6EC2BCAF@smtp.kernel.org> Precedence: bulk X-Mailing-List: mm-commits@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: The patch titled Subject: arm64: support WFET in smp_cond_load_relaxed_timeout() has been added to the -mm mm-new branch. Its filename is arm64-support-wfet-in-smp_cond_load_relaxed_timeout.patch This patch will shortly appear at https://git.kernel.org/pub/scm/linux/kernel/git/akpm/25-new.git/tree/patches/arm64-support-wfet-in-smp_cond_load_relaxed_timeout.patch This patch will later appear in the mm-new branch at git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm Note, mm-new is a provisional staging ground for work-in-progress patches, and acceptance into mm-new is a notification for others take notice and to finish up reviews. Please do not hesitate to respond to review feedback and post updated versions to replace or incrementally fixup patches in mm-new. The mm-new branch of mm.git is not included in linux-next If a few days of testing in mm-new is successful, the patch will me moved into mm.git's mm-unstable branch, which is included in linux-next Before you just go and hit "reply", please: a) Consider who else should be cc'ed b) Prefer to cc a suitable mailing list as well c) Ideally: find the original patch on the mailing list and do a reply-to-all to that, adding suitable additional cc's *** Remember to use Documentation/process/submit-checklist.rst when testing your code *** The -mm tree is included into linux-next via various branches at git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm and is updated there most days ------------------------------------------------------ From: Ankur Arora Subject: arm64: support WFET in smp_cond_load_relaxed_timeout() Date: Wed, 8 Apr 2026 17:55:28 +0530 To handle WFET use __cmpwait_timeout() similarly to __cmpwait(). These call out to the respective __cmpwait_case_timeout_##sz(), __cmpwait_case_##sz() functions. Link: https://lore.kernel.org/20260408122538.3610871-5-ankur.a.arora@oracle.com Signed-off-by: Ankur Arora Reviewed-by: Catalin Marinas Cc: Arnd Bergmann Cc: Will Deacon Cc: Alexei Starovoitov Cc: Bjorn Andersson Cc: Boqun Feng Cc: Boqun Feng Cc: Christoph Lameter Cc: Daniel Lezcano Cc: David Gow Cc: Gary Guo Cc: Haris Okanovic Cc: Ingo Molnar Cc: Konrad Dybcio Cc: Kumar Kartikeya Dwivedi Cc: Mark Rutland Cc: Peter Zijlstra Cc: Rafael J. Wysocki (Intel) Signed-off-by: Andrew Morton --- arch/arm64/include/asm/barrier.h | 8 ++- arch/arm64/include/asm/cmpxchg.h | 62 +++++++++++++++++++++++------ 2 files changed, 55 insertions(+), 15 deletions(-) --- a/arch/arm64/include/asm/barrier.h~arm64-support-wfet-in-smp_cond_load_relaxed_timeout +++ a/arch/arm64/include/asm/barrier.h @@ -224,8 +224,8 @@ do { \ extern bool arch_timer_evtstrm_available(void); /* - * In the common case, cpu_poll_relax() sits waiting in __cmpwait_relaxed() - * for the ptr value to change. + * In the common case, cpu_poll_relax() sits waiting in __cmpwait_relaxed()/ + * __cmpwait_relaxed_timeout() for the ptr value to change. * * Since this period is reasonably long, choose SMP_TIMEOUT_POLL_COUNT * to be 1, so smp_cond_load_{relaxed,acquire}_timeout() does a @@ -234,7 +234,9 @@ extern bool arch_timer_evtstrm_available #define SMP_TIMEOUT_POLL_COUNT 1 #define cpu_poll_relax(ptr, val, timeout_ns) do { \ - if (arch_timer_evtstrm_available()) \ + if (alternative_has_cap_unlikely(ARM64_HAS_WFXT)) \ + __cmpwait_relaxed_timeout(ptr, val, timeout_ns); \ + else if (arch_timer_evtstrm_available()) \ __cmpwait_relaxed(ptr, val); \ else \ cpu_relax(); \ --- a/arch/arm64/include/asm/cmpxchg.h~arm64-support-wfet-in-smp_cond_load_relaxed_timeout +++ a/arch/arm64/include/asm/cmpxchg.h @@ -12,6 +12,7 @@ #include #include +#include /* * We need separate acquire parameters for ll/sc and lse, since the full @@ -212,7 +213,8 @@ __CMPXCHG_GEN(_mb) #define __CMPWAIT_CASE(w, sfx, sz) \ static inline void __cmpwait_case_##sz(volatile void *ptr, \ - unsigned long val) \ + unsigned long val, \ + u64 __maybe_unused timeout_ns) \ { \ unsigned long tmp; \ \ @@ -235,20 +237,52 @@ __CMPWAIT_CASE( , , 64); #undef __CMPWAIT_CASE -#define __CMPWAIT_GEN(sfx) \ -static __always_inline void __cmpwait##sfx(volatile void *ptr, \ - unsigned long val, \ - int size) \ +#define __CMPWAIT_TIMEOUT_CASE(w, sfx, sz) \ +static inline void __cmpwait_case_timeout_##sz(volatile void *ptr, \ + unsigned long val, \ + u64 timeout_ns) \ +{ \ + unsigned long tmp; \ + u64 ecycles = __delay_cycles() + \ + NSECS_TO_CYCLES(timeout_ns); \ + asm volatile( \ + " sevl\n" \ + " wfe\n" \ + " ldxr" #sfx "\t%" #w "[tmp], %[v]\n" \ + " eor %" #w "[tmp], %" #w "[tmp], %" #w "[val]\n" \ + " cbnz %" #w "[tmp], 2f\n" \ + " msr s0_3_c1_c0_0, %[ecycles]\n" \ + "2:" \ + : [tmp] "=&r" (tmp), [v] "+Q" (*(u##sz *)ptr) \ + : [val] "r" (val), [ecycles] "r" (ecycles)); \ +} + +__CMPWAIT_TIMEOUT_CASE(w, b, 8); +__CMPWAIT_TIMEOUT_CASE(w, h, 16); +__CMPWAIT_TIMEOUT_CASE(w, , 32); +__CMPWAIT_TIMEOUT_CASE( , , 64); + +#undef __CMPWAIT_TIMEOUT_CASE + +#define __CMPWAIT_GEN(timeout, sfx) \ +static __always_inline void __cmpwait##timeout##sfx(volatile void *ptr, \ + unsigned long val, \ + u64 timeout_ns, \ + int size) \ { \ switch (size) { \ case 1: \ - return __cmpwait_case##sfx##_8(ptr, (u8)val); \ + return __cmpwait_case##timeout##sfx##_8(ptr, (u8)val, \ + timeout_ns); \ case 2: \ - return __cmpwait_case##sfx##_16(ptr, (u16)val); \ + return __cmpwait_case##timeout##sfx##_16(ptr, (u16)val, \ + timeout_ns); \ case 4: \ - return __cmpwait_case##sfx##_32(ptr, val); \ + return __cmpwait_case##timeout##sfx##_32(ptr, val, \ + timeout_ns); \ case 8: \ - return __cmpwait_case##sfx##_64(ptr, val); \ + return __cmpwait_case##timeout##sfx##_64(ptr, val, \ + timeout_ns); \ default: \ BUILD_BUG(); \ } \ @@ -256,11 +290,15 @@ static __always_inline void __cmpwait##s unreachable(); \ } -__CMPWAIT_GEN() +__CMPWAIT_GEN( , ) +__CMPWAIT_GEN(_timeout, ) #undef __CMPWAIT_GEN -#define __cmpwait_relaxed(ptr, val) \ - __cmpwait((ptr), (unsigned long)(val), sizeof(*(ptr))) +#define __cmpwait_relaxed_timeout(ptr, val, timeout_ns) \ + __cmpwait_timeout((ptr), (unsigned long)(val), timeout_ns, sizeof(*(ptr))) + +#define __cmpwait_relaxed(ptr, val) \ + __cmpwait((ptr), (unsigned long)(val), 0, sizeof(*(ptr))) #endif /* __ASM_CMPXCHG_H */ _ Patches currently in -mm which might be from ankur.a.arora@oracle.com are asm-generic-barrier-add-smp_cond_load_relaxed_timeout.patch arm64-barrier-support-smp_cond_load_relaxed_timeout.patch arm64-delay-move-some-constants-out-to-a-separate-header.patch arm64-support-wfet-in-smp_cond_load_relaxed_timeout.patch arm64-rqspinlock-remove-private-copy-of-smp_cond_load_acquire_timewait.patch asm-generic-barrier-add-smp_cond_load_acquire_timeout.patch atomic-add-atomic_cond_read__timeout.patch locking-atomic-scripts-build-atomic_long_cond_read__timeout.patch bpf-rqspinlock-switch-check_timeout-to-a-clock-interface.patch bpf-rqspinlock-use-smp_cond_load_acquire_timeout.patch sched-add-need-resched-timed-wait-interface.patch cpuidle-poll_state-wait-for-need-resched-via-tif_need_resched_relaxed_wait.patch kunit-enable-testing-smp_cond_load_relaxed_timeout.patch kunit-add-tests-for-smp_cond_load_relaxed_timeout.patch