From: Brian Cain <brian.cain@oss.qualcomm.com>
To: qemu-devel@nongnu.org, stefanha@redhat.com
Cc: brian.cain@oss.qualcomm.com,
Taylor Simpson <ltaylorsimpson@gmail.com>,
Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>,
Anton Johansson <anjo@rev.ng>,
Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>
Subject: [PULL 6/9] Hexagon (target/hexagon) Disassembly of invalid packets
Date: Thu, 23 Apr 2026 19:36:03 -0700 [thread overview]
Message-ID: <20260424023606.2556830-7-brian.cain@oss.qualcomm.com> (raw)
In-Reply-To: <20260424023606.2556830-1-brian.cain@oss.qualcomm.com>
From: Taylor Simpson <ltaylorsimpson@gmail.com>
We pass the Hexagon CPU definition to disassemble_hexagon. This allows
decode_packet to know if the opcodes are supported.
Note that we print valid instructions in a packet when one or more is
invalid. Rather than this
0x0002128c: 0x1eae4fec { <invalid>
0x00021290: 0x1c434c04 <invalid>
0x00021294: 0x1e03edf0 <invalid> }
We print this
0x0002128c: 0x1eae4fec { <invalid>
0x00021290: 0x1c434c04 V4.w = vadd(V12.w,V3.w)
0x00021294: 0x1e03edf0 V16 = V13 }
Co-authored-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>
Co-authored-by: Brian Cain <brian.cain@oss.qualcomm.com>
Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Brian Cain <brian.cain@oss.qualcomm.com>
---
target/hexagon/cpu_bits.h | 4 +++-
target/hexagon/printinsn.h | 3 ++-
disas/hexagon.c | 3 ++-
target/hexagon/cpu.c | 2 ++
target/hexagon/decode.c | 25 +++++++++++++++++++++----
target/hexagon/printinsn.c | 9 +++++++--
6 files changed, 37 insertions(+), 9 deletions(-)
diff --git a/target/hexagon/cpu_bits.h b/target/hexagon/cpu_bits.h
index 19beca81c0c..aaac6b9ea64 100644
--- a/target/hexagon/cpu_bits.h
+++ b/target/hexagon/cpu_bits.h
@@ -19,6 +19,7 @@
#define HEXAGON_CPU_BITS_H
#include "qemu/bitops.h"
+#include "cpu-qom.h"
#define PCALIGN 4
#define PCALIGN_MASK (PCALIGN - 1)
@@ -65,6 +66,7 @@ static inline bool is_packet_end(uint32_t endocing)
return ((bits == 0x3) || (bits == 0x0));
}
-int disassemble_hexagon(uint32_t *words, int nwords, bfd_vma pc, GString *buf);
+int disassemble_hexagon(uint32_t *words, int nwords, bfd_vma pc, GString *buf,
+ const HexagonCPUDef *hex_def);
#endif
diff --git a/target/hexagon/printinsn.h b/target/hexagon/printinsn.h
index 2ecd1731d03..6f84ef93c3b 100644
--- a/target/hexagon/printinsn.h
+++ b/target/hexagon/printinsn.h
@@ -18,10 +18,11 @@
#ifndef HEXAGON_PRINTINSN_H
#define HEXAGON_PRINTINSN_H
+#include "cpu-qom.h"
#include "insn.h"
void snprint_a_pkt_disas(GString *buf, Packet *pkt, uint32_t *words,
- target_ulong pc);
+ target_ulong pc, const HexagonCPUDef *hex_def);
void snprint_a_pkt_debug(GString *buf, Packet *pkt);
#endif
diff --git a/disas/hexagon.c b/disas/hexagon.c
index c1a4ffc5f6b..36b8321c26a 100644
--- a/disas/hexagon.c
+++ b/disas/hexagon.c
@@ -31,6 +31,7 @@
int print_insn_hexagon(bfd_vma memaddr, struct disassemble_info *info)
{
+ const HexagonCPUDef *hex_def = (const HexagonCPUDef *)info->target_info;
uint32_t words[PACKET_WORDS_MAX];
bool found_end = false;
GString *buf;
@@ -58,7 +59,7 @@ int print_insn_hexagon(bfd_vma memaddr, struct disassemble_info *info)
}
buf = g_string_sized_new(PACKET_BUFFER_LEN);
- len = disassemble_hexagon(words, i, memaddr, buf);
+ len = disassemble_hexagon(words, i, memaddr, buf, hex_def);
(*info->fprintf_func)(info->stream, "%s", buf->str);
g_string_free(buf, true);
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 23ac91e7b47..2c53f2c2836 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -297,8 +297,10 @@ static void hexagon_cpu_reset_hold(Object *obj, ResetType type)
static void hexagon_cpu_disas_set_info(const CPUState *cs,
disassemble_info *info)
{
+ const HexagonCPU *cpu = HEXAGON_CPU(cs);
info->print_insn = print_insn_hexagon;
info->endian = BFD_ENDIAN_LITTLE;
+ info->target_info = HEXAGON_CPU_GET_CLASS(cpu)->hex_def;
}
static void hexagon_cpu_realize(DeviceState *dev, Error **errp)
diff --git a/target/hexagon/decode.c b/target/hexagon/decode.c
index b8a1cd5b12b..c4cf430e5a2 100644
--- a/target/hexagon/decode.c
+++ b/target/hexagon/decode.c
@@ -828,19 +828,36 @@ int decode_packet(DisasContext *ctx, int max_words, const uint32_t *words,
/* Used for "-d in_asm" logging */
int disassemble_hexagon(uint32_t *words, int nwords, bfd_vma pc,
- GString *buf)
+ GString *buf, const HexagonCPUDef *hex_def)
{
+ HexagonCPUDef any_def = {
+ .hex_version = HEX_VER_ANY, /* Allow decode to accept anything */
+ };
DisasContext ctx;
Packet pkt;
memset(&ctx, 0, sizeof(DisasContext));
+ ctx.hex_def = &any_def;
ctx.pkt = &pkt;
if (decode_packet(&ctx, nwords, words, &pkt, true) > 0) {
- snprint_a_pkt_disas(buf, &pkt, words, pc);
+ snprint_a_pkt_disas(buf, &pkt, words, pc, hex_def);
return pkt.encod_pkt_size_in_bytes;
} else {
- g_string_assign(buf, "<invalid>");
- return 0;
+ for (int i = 0; i < nwords; i++) {
+ g_string_append_printf(buf, "0x" TARGET_FMT_lx "\t", words[i]);
+ if (i == 0) {
+ g_string_append(buf, "{");
+ }
+ g_string_append(buf, "\t");
+ g_string_append(buf, "<invalid>");
+ if (i < nwords - 1) {
+ pc += 4;
+ g_string_append_printf(buf, "\n0x" TARGET_FMT_lx ": ",
+ (target_ulong)pc);
+ }
+ }
+ g_string_append(buf, " }");
+ return nwords * sizeof(uint32_t);
}
}
diff --git a/target/hexagon/printinsn.c b/target/hexagon/printinsn.c
index 4865cdd133b..22b305f018e 100644
--- a/target/hexagon/printinsn.c
+++ b/target/hexagon/printinsn.c
@@ -21,6 +21,7 @@
#include "insn.h"
#include "reg_fields.h"
#include "internal.h"
+#include "decode.h"
static const char *sreg2str(unsigned int reg)
{
@@ -51,7 +52,7 @@ static void snprintinsn(GString *buf, Insn *insn)
}
void snprint_a_pkt_disas(GString *buf, Packet *pkt, uint32_t *words,
- target_ulong pc)
+ target_ulong pc, const HexagonCPUDef *hex_def)
{
bool has_endloop0 = false;
bool has_endloop1 = false;
@@ -83,7 +84,11 @@ void snprint_a_pkt_disas(GString *buf, Packet *pkt, uint32_t *words,
}
g_string_append(buf, "\t");
- snprintinsn(buf, &(pkt->insn[i]));
+ if (opcode_supported(pkt->insn[i].opcode, hex_def)) {
+ snprintinsn(buf, &(pkt->insn[i]));
+ } else {
+ g_string_append(buf, "<invalid>");
+ }
if (i < pkt->num_insns - 1) {
/*
--
2.34.1
next prev parent reply other threads:[~2026-04-24 2:37 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-24 2:35 [PULL 0/9] hex queue Brian Cain
2026-04-24 2:35 ` [PULL 1/9] Hexagon (target/hexagon) Properly handle Hexagon CPU version Brian Cain
2026-04-24 2:35 ` [PULL 2/9] Hexagon (linux-user/hexagon) Identify Hexagon version in ELF file Brian Cain
2026-04-24 2:36 ` [PULL 3/9] Hexagon (target/hexagon) Add Hexagon definition field to DisasContext Brian Cain
2026-04-24 2:36 ` [PULL 4/9] Hexagon (target/hexagon) Introduce tag_rev_info.c.inc Brian Cain
2026-04-24 2:36 ` [PULL 5/9] Hexagon (target/hexagon) Check each opcode against current CPU definition Brian Cain
2026-04-24 2:36 ` Brian Cain [this message]
2026-04-24 2:36 ` [PULL 7/9] tests/tcg/hexagon: Add test for revision-gated instruction decoding Brian Cain
2026-04-24 2:36 ` [PULL 8/9] Hexagon (target/hexagon) Remove snprint_a_pkt_debug Brian Cain
2026-04-24 2:36 ` [PULL 9/9] target/hexagon: Change DisasContext packet type Brian Cain
2026-04-25 16:59 ` [PULL 0/9] hex queue Stefan Hajnoczi
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