From: Simon Horman <horms@kernel.org>
To: Heiko Schocher <hs@nabladev.com>
Cc: netdev@vger.kernel.org, Andrew Lunn <andrew@lunn.ch>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Heiner Kallweit <hkallweit1@gmail.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Russell King <linux@armlinux.org.uk>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1] net: phy: dp83869: fix setting CLK_O_SEL field.
Date: Tue, 28 Apr 2026 14:01:28 +0100 [thread overview]
Message-ID: <20260428130128.GR900403@horms.kernel.org> (raw)
In-Reply-To: <20260425031339.3318-1-hs@nabladev.com>
On Sat, Apr 25, 2026 at 05:13:39AM +0200, Heiko Schocher wrote:
> Table 7-121 in datasheet says we have to set register 0xc6
> to value 0x10 before CLK_O_SEL can be modified. No more infos
> about this field found in datasheet. With this fix, setting
> of CLK_O_SEL field in IO_MUX_CFG register worked through dts
> property "ti,clk-output-sel" on a DP83869HMRGZR.
>
> Signed-off-by: Heiko Schocher <hs@nabladev.com>
Reviewed-by: Simon Horman <horms@kernel.org>
next prev parent reply other threads:[~2026-04-28 13:01 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-25 3:13 [PATCH v1] net: phy: dp83869: fix setting CLK_O_SEL field Heiko Schocher
2026-04-28 13:01 ` Simon Horman [this message]
2026-04-28 13:50 ` Paolo Abeni
2026-04-28 13:54 ` Heiko Schocher
2026-04-28 14:00 ` patchwork-bot+netdevbpf
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