All of lore.kernel.org
 help / color / mirror / Atom feed
From: Harsh Prateek Bora <harshpb@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: Aditya Gupta <adityag@linux.ibm.com>,
	Hari Bathini <hbathini@linux.ibm.com>,
	Sourabh Jain <sourabhjain@linux.ibm.com>,
	Shivang Upadhyay <shivangu@linux.ibm.com>
Subject: [PULL 06/13] pnv/mpipl: Set thread entry size to be allocated by firmware
Date: Thu, 30 Apr 2026 00:02:56 +0530	[thread overview]
Message-ID: <20260429183310.12455-7-harshpb@linux.ibm.com> (raw)
In-Reply-To: <20260429183310.12455-1-harshpb@linux.ibm.com>

From: Aditya Gupta <adityag@linux.ibm.com>

Set the "Thread Register State Entry Size" that is required by firmware
(OPAL), to know size of memory to allocate to capture CPU state, in the
event of a crash

Reviewed-by: Hari Bathini <hbathini@linux.ibm.com>
Reviewed-by: Sourabh Jain <sourabhjain@linux.ibm.com>
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
Tested-by: Shivang Upadhyay <shivangu@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260424083837.214947-7-adityag@linux.ibm.com
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
---
 hw/ppc/pnv.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 524563dcfc..09b69c355a 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -748,10 +748,35 @@ static void pnv_powerdown_notify(Notifier *n, void *opaque)
 
 static void pnv_reset(MachineState *machine, ResetType type)
 {
+    PnvMachineState *pnv = PNV_MACHINE(machine);
     void *fdt;
 
     qemu_devices_reset(type);
 
+    if (!pnv->mpipl_state.is_next_boot_mpipl) {
+        /*
+         * Set the "Thread Register State Entry Size", so that firmware can
+         * allocate enough memory to capture CPU state in the event of a
+         * crash
+         */
+
+        MpiplProcDumpArea proc_area;
+
+        proc_area.version = PROC_DUMP_AREA_VERSION_P9;
+        proc_area.thread_size = cpu_to_be32(sizeof(MpiplPreservedCPUState));
+
+        /* These are to be allocated & assigned by the firmware */
+        proc_area.alloc_addr = 0;
+        proc_area.alloc_size = 0;
+
+        /* These get assigned after crash, when QEMU preserves the registers */
+        proc_area.dest_addr = 0;
+        proc_area.act_size = 0;
+
+        cpu_physical_memory_write(PROC_DUMP_AREA_OFF, &proc_area,
+                sizeof(proc_area));
+    }
+
     fdt = machine->fdt;
     cpu_physical_memory_write(PNV_FDT_ADDR, fdt, fdt_totalsize(fdt));
 }
-- 
2.52.0



  parent reply	other threads:[~2026-04-29 18:35 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-04-29 18:32 [PULL 00/13] PPC PR for 11.1 (2026-04-29) Harsh Prateek Bora
2026-04-29 18:32 ` [PULL 01/13] ppc/pnv: Move SBE host doorbell function to top of file Harsh Prateek Bora
2026-04-29 18:32 ` [PULL 02/13] ppc/mpipl: Implement S0 SBE interrupt Harsh Prateek Bora
2026-04-29 18:32 ` [PULL 03/13] ppc/pnv: Handle stash command in PowerNV SBE Harsh Prateek Bora
2026-04-29 18:32 ` [PULL 04/13] pnv/mpipl: Preserve memory regions as per MDST/MDDT tables Harsh Prateek Bora
2026-04-29 18:32 ` [PULL 05/13] pnv/mpipl: Preserve CPU registers after crash Harsh Prateek Bora
2026-04-29 18:32 ` Harsh Prateek Bora [this message]
2026-05-08  9:15   ` [PULL 06/13] pnv/mpipl: Set thread entry size to be allocated by firmware Peter Maydell
2026-05-08 10:18     ` Shivang Upadhyay
2026-04-29 18:32 ` [PULL 07/13] pnv/mpipl: Write the preserved CPU and MDRT state Harsh Prateek Bora
2026-04-29 18:32 ` [PULL 08/13] pnv/mpipl: Enable MPIPL support Harsh Prateek Bora
2026-04-29 18:32 ` [PULL 09/13] tests/functional: Add test for MPIPL in PowerNV Harsh Prateek Bora
2026-04-29 18:33 ` [PULL 10/13] MAINTAINERS: Add entry for MPIPL (PowerNV) Harsh Prateek Bora
2026-04-29 18:33 ` [PULL 11/13] hw/ssi/pnv_spi: Fix fifo8 memory leak on unrealize Harsh Prateek Bora
2026-04-29 18:33 ` [PULL 12/13] ppc/pnv: Add a nest MMU model Harsh Prateek Bora
2026-04-29 18:33 ` [PULL 13/13] hw/intc/xics: Add a check for an invalid server id Harsh Prateek Bora
2026-04-30 17:35 ` [PULL 00/13] PPC PR for 11.1 (2026-04-29) Stefan Hajnoczi

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260429183310.12455-7-harshpb@linux.ibm.com \
    --to=harshpb@linux.ibm.com \
    --cc=adityag@linux.ibm.com \
    --cc=hbathini@linux.ibm.com \
    --cc=qemu-devel@nongnu.org \
    --cc=shivangu@linux.ibm.com \
    --cc=sourabhjain@linux.ibm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.