From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "philmd@linaro.org" <philmd@linaro.org>,
"peterx@redhat.com" <peterx@redhat.com>,
"Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>, "Zhao Liu" <zhao1.liu@intel.com>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Jamin Lin <jamin_lin@aspeedtech.com>,
Troy Lee <troy_lee@aspeedtech.com>,
"farosas@suse.de" <farosas@suse.de>,
"flwu@google.com" <flwu@google.com>,
"nabihestefan@google.com" <nabihestefan@google.com>
Subject: [PATCH v6 05/11] hw/usb/hcd-ehci: Implement 64-bit qTD descriptor addressing
Date: Mon, 4 May 2026 02:53:49 +0000 [thread overview]
Message-ID: <20260504025342.1452605-6-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260504025342.1452605-1-jamin_lin@aspeedtech.com>
EHCI supports 64-bit addressing when the 64-bit Addressing Capability
bit in HCCPARAMS is set. In that mode, the CTRLDSSEGMENT register
provides the upper 32 bits that are concatenated with 32-bit link
pointer values to form 64-bit control data structure addresses
(EHCI 1.0, section 2.3.5 and Appendix B).
qTD link pointers (current_qtd/next_qtd/altnext_qtd and qTD.next)
are stored as 32-bit values in the data structures and must be
expanded to full 64-bit descriptor addresses when 64-bit mode is
enabled. Update the qTD traversal paths to use ehci_get_desc_addr()
when following link pointers.
Appendix B also defines high dword fields for qTD buffer pointers.
Add bufptr_hi[5] to EHCIqtd and extend qTD fetch and QH overlay
handling to load and propagate the high buffer pointer fields.
When 64-bit capability is disabled, descriptor and buffer addresses
remain 32-bit and existing behaviour is unchanged.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
hw/usb/hcd-ehci.h | 1 +
hw/usb/hcd-ehci.c | 19 ++++++++++++-------
2 files changed, 13 insertions(+), 7 deletions(-)
diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h
index 3428839ec6..fc66aacd9f 100644
--- a/hw/usb/hcd-ehci.h
+++ b/hw/usb/hcd-ehci.h
@@ -139,6 +139,7 @@ typedef struct EHCIqtd {
uint32_t bufptr[5]; /* Standard buffer pointer */
#define QTD_BUFPTR_MASK 0xfffff000
#define QTD_BUFPTR_SH 12
+ uint32_t bufptr_hi[5];
} EHCIqtd;
/* QH overlay: altnext_qtd, token, bufptr[5], bufptr_hi[5] */
diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c
index e770f0a7fa..238f08b4a5 100644
--- a/hw/usb/hcd-ehci.c
+++ b/hw/usb/hcd-ehci.c
@@ -472,7 +472,8 @@ static bool ehci_verify_qtd(EHCIPacket *p, EHCIqtd *qtd)
(p->qtd.next != qtd->next)) ||
(!NLPTR_TBIT(p->qtd.altnext) && (p->qtd.altnext != qtd->altnext)) ||
p->qtd.token != qtd->token ||
- p->qtd.bufptr[0] != qtd->bufptr[0]) {
+ p->qtd.bufptr[0] != qtd->bufptr[0] ||
+ p->qtd.bufptr_hi[0] != qtd->bufptr_hi[0]) {
return false;
} else {
return true;
@@ -1200,6 +1201,7 @@ static int ehci_qh_do_overlay(EHCIQueue *q)
for (i = 0; i < 5; i++) {
q->qh.bufptr[i] = p->qtd.bufptr[i];
+ q->qh.bufptr_hi[i] = p->qtd.bufptr_hi[i];
}
if (!(q->qh.epchar & QH_EPCHAR_DTC)) {
@@ -1233,7 +1235,8 @@ static int ehci_init_transfer(EHCIPacket *p)
return -1;
}
- page = p->qtd.bufptr[cpage] & QTD_BUFPTR_MASK;
+ page = ehci_get_buf_addr(p->queue->ehci, p->qtd.bufptr_hi[cpage],
+ p->qtd.bufptr[cpage], QTD_BUFPTR_MASK);
page += offset;
plen = bytes;
if (plen > 4096 - offset) {
@@ -1727,7 +1730,7 @@ static EHCIQueue *ehci_state_fetchqh(EHCIState *ehci, int async)
} else if ((q->qh.token & QTD_TOKEN_ACTIVE) &&
(NLPTR_TBIT(q->qh.current_qtd) == 0) &&
(q->qh.current_qtd != 0)) {
- q->qtdaddr = q->qh.current_qtd;
+ q->qtdaddr = ehci_get_desc_addr(ehci, q->qh.current_qtd);
ehci_set_state(ehci, async, EST_FETCHQTD);
} else {
@@ -1805,14 +1808,14 @@ static int ehci_state_advqueue(EHCIQueue *q)
*/
if (((q->qh.token & QTD_TOKEN_TBYTES_MASK) != 0) &&
(NLPTR_TBIT(q->qh.altnext_qtd) == 0)) {
- q->qtdaddr = q->qh.altnext_qtd;
+ q->qtdaddr = ehci_get_desc_addr(q->ehci, q->qh.altnext_qtd);
ehci_set_state(q->ehci, q->async, EST_FETCHQTD);
/*
* next qTD is valid
*/
} else if (NLPTR_TBIT(q->qh.next_qtd) == 0) {
- q->qtdaddr = q->qh.next_qtd;
+ q->qtdaddr = ehci_get_desc_addr(q->ehci, q->qh.next_qtd);
ehci_set_state(q->ehci, q->async, EST_FETCHQTD);
/*
@@ -1841,7 +1844,9 @@ static int ehci_state_fetchqtd(EHCIQueue *q)
if (get_dwords(q->ehci, addr + 0, &qtd.next, 1) < 0 ||
get_dwords(q->ehci, addr + 4, &qtd.altnext, 1) < 0 ||
get_dwords(q->ehci, addr + 12, qtd.bufptr,
- ARRAY_SIZE(qtd.bufptr)) < 0) {
+ ARRAY_SIZE(qtd.bufptr)) < 0 ||
+ get_dwords(q->ehci, addr + 32, qtd.bufptr_hi,
+ ARRAY_SIZE(qtd.bufptr_hi)) < 0) {
return 0;
}
ehci_trace_qtd(q, NLPTR_GET(q->qtdaddr), &qtd);
@@ -1922,7 +1927,7 @@ static int ehci_fill_queue(EHCIPacket *p)
if (NLPTR_TBIT(qtd.next) != 0) {
break;
}
- qtdaddr = qtd.next;
+ qtdaddr = ehci_get_desc_addr(q->ehci, qtd.next);
/*
* Detect circular td lists, Windows creates these, counting on the
* active bit going low after execution to make the queue stop.
--
2.43.0
next prev parent reply other threads:[~2026-05-04 2:54 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-04 2:53 [PATCH v6 00/11] hw/usb/ehci: Add 64-bit descriptor addressing support Jamin Lin
2026-05-04 2:53 ` [PATCH v6 01/11] tests/functional/arm/test_aspeed_ast2600_sdk: Add USB EHCI test for AST2600 SDK Jamin Lin
2026-05-04 2:53 ` [PATCH v6 02/11] hw/usb/hcd-ehci: Change descriptor addresses to 64-bit with migration compatibility Jamin Lin
2026-05-04 5:19 ` Cédric Le Goater
2026-05-04 12:17 ` Philippe Mathieu-Daudé
2026-05-06 2:09 ` Jamin Lin
2026-05-06 3:38 ` Jamin Lin
2026-05-04 2:53 ` [PATCH v6 03/11] hw/usb/hcd-ehci: Add property to advertise 64-bit addressing capability Jamin Lin
2026-05-04 2:53 ` [PATCH v6 04/11] hw/usb/hcd-ehci: Implement 64-bit QH descriptor addressing Jamin Lin
2026-05-04 2:53 ` Jamin Lin [this message]
2026-05-04 2:53 ` [PATCH v6 06/11] hw/usb/hcd-ehci: Implement 64-bit iTD " Jamin Lin
2026-05-04 2:53 ` [PATCH v6 07/11] hw/usb/hcd-ehci: Implement 64-bit siTD " Jamin Lin
2026-05-04 2:53 ` [PATCH v6 08/11] hw/usb/hcd-ehci: Add ctrldssegment-default property Jamin Lin
2026-05-04 11:18 ` Philippe Mathieu-Daudé
2026-05-04 12:17 ` Cédric Le Goater
2026-05-04 12:42 ` Philippe Mathieu-Daudé
2026-05-04 13:12 ` Cédric Le Goater
2026-05-06 1:22 ` Jamin Lin
2026-05-06 3:36 ` Jamin Lin
2026-05-04 2:53 ` [PATCH v6 09/11] hw/arm/aspeed_ast27x0: Set EHCI ctrldssegment-default Jamin Lin
2026-05-04 11:19 ` Philippe Mathieu-Daudé
2026-05-04 2:53 ` [PATCH v6 10/11] hw/arm/aspeed_ast27x0: Enable 64-bit EHCI DMA addressing Jamin Lin
2026-05-04 2:53 ` [PATCH v6 11/11] tests/functional/aarch64/test_aspeed_ast2700: Add USB EHCI test for AST2700 A1/A2 Jamin Lin
2026-05-04 5:27 ` [PATCH v6 00/11] hw/usb/ehci: Add 64-bit descriptor addressing support Cédric Le Goater
2026-05-11 6:13 ` Cédric Le Goater
2026-05-11 6:30 ` Jamin Lin
2026-05-12 14:47 ` Cédric Le Goater
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