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From: Xi Pardee <xi.pardee@linux.intel.com>
To: xi.pardee@linux.intel.com, irenic.rajneesh@gmail.com,
	david.e.box@linux.intel.com, ilpo.jarvinen@linux.intel.com,
	platform-driver-x86@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org
Subject: [PATCH v3 0/7] Enable NVL support in intel_pmc_core
Date: Mon,  4 May 2026 21:33:31 -0700	[thread overview]
Message-ID: <20260505043342.2573556-1-xi.pardee@linux.intel.com> (raw)

This patch series introduces two new features, enhances existing
functionalities, and adds NVL support to the intel_pmc_core driver.

The first three patches add new attributes to improve Package C-state
debugging. The fourth and fifth patches refine current functionality
for better support. The sixth patch enables the intel_pmc_core driver
retrieves PMC information only for available PMCs. Finally, the last
patch adds support for Nova Lake platforms.

v3->v2:
- Move common helper code to patch 2 to avoid switch code back and
  forth.
- Remove unneeded empty line.
- Add #include for BIT() in nvl.c.
- Change pmc_list to be const variables.
- Change PPFEAR_MAX_NUM_ENTRIES to 13.

v2->v1:
- Add a patch to use __free(pci_dev_put) in pmc_core_punit_pmt_init().
- When using scoped base cleanup method, move variable declaration and
  assignment in one place.
- Simplifies logic and remove unneeded offset variables.
- Create common helper function to used by pmc_core_pkgc_ltr_blocker_show()
  and pmc_core_pkgc_blocker_residency_show()
- Add num_pmcs field in pmc_dev_info struct to store the number of PMCs
  available in the platform.
- Use lowercase letter for variable in nvl.c().
- Fix typo.

Xi Pardee (7):
  platform/x86/intel/pmc: Use __free() in pmc_core_punit_pmt_init()
  platform/x86/intel/pmc: Enable PkgC LTR blocking counter
  platform/x86/intel/pmc: Enable Pkgc blocking residency counter
  platform/x86/intel/pmc: Use PCI DID for PMC SSRAM device discovery
  platform/x86/intel/pmc: Add support for variable DMU offsets
  platform/x86/intel/pmc: Retrieve PMC info only for available PMCs
  platform/x86/intel/pmc: Add Nova Lake support to intel_pmc_core driver

 drivers/platform/x86/intel/pmc/Makefile |    3 +-
 drivers/platform/x86/intel/pmc/arl.c    |   13 +-
 drivers/platform/x86/intel/pmc/core.c   |  137 +-
 drivers/platform/x86/intel/pmc/core.h   |   68 +-
 drivers/platform/x86/intel/pmc/lnl.c    |    6 +-
 drivers/platform/x86/intel/pmc/mtl.c    |    7 +-
 drivers/platform/x86/intel/pmc/nvl.c    | 1539 +++++++++++++++++++++++
 drivers/platform/x86/intel/pmc/ptl.c    |    8 +-
 drivers/platform/x86/intel/pmc/wcl.c    |    6 +-
 9 files changed, 1748 insertions(+), 39 deletions(-)
 create mode 100644 drivers/platform/x86/intel/pmc/nvl.c

-- 
2.43.0


             reply	other threads:[~2026-05-05  4:33 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-05  4:33 Xi Pardee [this message]
2026-05-05  4:33 ` [PATCH v3 1/7] platform/x86/intel/pmc: Use __free() in pmc_core_punit_pmt_init() Xi Pardee
2026-05-05  4:33 ` [PATCH v3 2/7] platform/x86/intel/pmc: Enable PkgC LTR blocking counter Xi Pardee
2026-05-05  4:33 ` [PATCH v3 3/7] platform/x86/intel/pmc: Enable Pkgc blocking residency counter Xi Pardee
2026-05-05  4:33 ` [PATCH v3 4/7] platform/x86/intel/pmc: Use PCI DID for PMC SSRAM device discovery Xi Pardee
2026-05-05  4:33 ` [PATCH v3 5/7] platform/x86/intel/pmc: Add support for variable DMU offsets Xi Pardee
2026-05-05  4:33 ` [PATCH v3 6/7] platform/x86/intel/pmc: Retrieve PMC info only for available PMCs Xi Pardee
2026-05-05  4:33 ` [PATCH v3 7/7] platform/x86/intel/pmc: Add Nova Lake support to intel_pmc_core driver Xi Pardee
2026-05-08 18:54 ` [PATCH v3 0/7] Enable NVL support in intel_pmc_core Ilpo Järvinen

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