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From: sashiko-bot@kernel.org
To: "Terry Bowman" <terry.bowman@amd.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: [PATCH v17 05/11] cxl: Limit CXL-CPER kfifo registration functions scope
Date: Tue, 05 May 2026 21:52:28 +0000	[thread overview]
Message-ID: <20260505215228.8E5B1C2BCB4@smtp.kernel.org> (raw)
In-Reply-To: <20260505173029.2718246-6-terry.bowman@amd.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Deadlock risk in CPER kfifo registration functions due to non-IRQ-safe spinlocks.
--

commit 49bcf423cba32ca4c5cff3926588ae3d815744d1
Author: Dan Williams <djbw@kernel.org>

cxl: Limit CXL-CPER kfifo registration functions scope

This commit replaces EXPORT_SYMBOL_NS_GPL with EXPORT_SYMBOL_FOR_MODULES
for CXL-CPER kfifo registration functions to improve access control. It also
changes the register and unregister functions to return void and adds
synchronous cancellation during unregistration.

> diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c
> index 3236a3ce79d6b..dd0a073af93c3 100644
> --- a/drivers/acpi/apei/ghes.c
> +++ b/drivers/acpi/apei/ghes.c
> @@ -778,33 +778,34 @@ static void cxl_cper_post_prot_err(struct cxl_cper_sec_prot_err *prot_err,
>  #endif
>  }
>  
> -int cxl_cper_register_prot_err_work(struct work_struct *work)
> +void cxl_cper_register_prot_err_work(struct work_struct *work)
>  {
> -	if (cxl_cper_prot_err_work)
> -		return -EINVAL;
> -
>  	guard(spinlock)(&cxl_cper_prot_err_work_lock);

Could this lead to a deadlock with the hardware error interrupt handler?

Looking at cxl_cper_post_prot_err() which is called from GHES error handling
in hard IRQ context, it uses the IRQ-safe variant to acquire the same lock:

	guard(spinlock_irqsave)(&cxl_cper_prot_err_work_lock);

Since guard(spinlock) in cxl_cper_register_prot_err_work() leaves local
interrupts enabled, if a hardware error interrupt occurs on the same CPU
while the lock is held here, the interrupt handler will execute
cxl_cper_post_prot_err() and spin indefinitely waiting for the lock.

Would it be better to use guard(spinlock_irqsave) here and in the unregister
function to prevent this lockup?

> +	WARN_ONCE(cxl_cper_prot_err_work,
> +		  "CPER-CXL kfifo consumer already registered\n");
>  	cxl_cper_prot_err_work = work;
> -	return 0;
>  }
> -EXPORT_SYMBOL_NS_GPL(cxl_cper_register_prot_err_work, "CXL");
> +EXPORT_SYMBOL_FOR_MODULES(cxl_cper_register_prot_err_work, "cxl_core");
>  
> -int cxl_cper_unregister_prot_err_work(struct work_struct *work)
> +void cxl_cper_unregister_prot_err_work(void)
>  {
> -	if (cxl_cper_prot_err_work != work)
> -		return -EINVAL;
> +	struct work_struct *work;
>  
> -	guard(spinlock)(&cxl_cper_prot_err_work_lock);
> +	spin_lock(&cxl_cper_prot_err_work_lock);

Similarly, does this need to be spin_lock_irqsave() to protect against
the same deadlock scenario?

> +	work = cxl_cper_prot_err_work;
>  	cxl_cper_prot_err_work = NULL;
> -	return 0;
> +	spin_unlock(&cxl_cper_prot_err_work_lock);
> +
> +	if (work)
> +		cancel_work_sync(work);
>  }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260505173029.2718246-1-terry.bowman@amd.com?part=5

  reply	other threads:[~2026-05-05 21:52 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-05 17:30 [PATCH v17 00/11] Enable CXL PCIe Port Protocol Error handling and logging Terry Bowman
2026-05-05 17:30 ` [PATCH v17 01/11] PCI/AER: Introduce AER-CXL Kfifo Terry Bowman
2026-05-05 20:26   ` sashiko-bot
2026-05-05 21:17   ` Dave Jiang
2026-05-07 17:53   ` Jonathan Cameron
2026-05-07 18:26     ` Bowman, Terry
2026-05-05 17:30 ` [PATCH v17 02/11] cxl/ras: Unify Endpoint and Port AER trace events Terry Bowman
2026-05-05 21:07   ` sashiko-bot
2026-05-05 21:46   ` Dave Jiang
2026-05-07 18:08   ` Jonathan Cameron
2026-05-07 18:33     ` Bowman, Terry
2026-05-08 14:05       ` Jonathan Cameron
2026-05-09  3:49         ` Dan Williams (nvidia)
2026-05-11 12:51           ` Bowman, Terry
2026-05-11 23:28             ` Dan Williams (nvidia)
2026-05-05 17:30 ` [PATCH v17 03/11] cxl: Use common CPER handling for all CXL devices Terry Bowman
2026-05-05 21:30   ` sashiko-bot
2026-05-05 22:02   ` Dave Jiang
2026-05-05 17:30 ` [PATCH v17 04/11] cxl: Rename find_cxl_port() to find_cxl_port_by_dport() Terry Bowman
2026-05-05 22:06   ` Dave Jiang
2026-05-07 18:11     ` Jonathan Cameron
2026-05-05 17:30 ` [PATCH v17 05/11] cxl: Limit CXL-CPER kfifo registration functions scope Terry Bowman
2026-05-05 21:52   ` sashiko-bot [this message]
2026-05-05 22:16   ` Dave Jiang
2026-05-07 18:14   ` Jonathan Cameron
2026-05-05 17:30 ` [PATCH v17 06/11] PCI: Establish common CXL Port protocol error flow Terry Bowman
2026-05-05 22:28   ` sashiko-bot
2026-05-07 18:22   ` Jonathan Cameron
2026-05-05 17:30 ` [PATCH v17 07/11] PCI/CXL: Add RCH support to CXL handlers Terry Bowman
2026-05-05 23:34   ` sashiko-bot
2026-05-05 23:59   ` Dave Jiang
2026-05-05 17:30 ` [PATCH v17 08/11] cxl: Remove Endpoint AER correctable handler Terry Bowman
2026-05-05 17:30 ` [PATCH v17 09/11] cxl: Update Endpoint AER uncorrectable handler Terry Bowman
2026-05-06 17:43   ` Dave Jiang
2026-05-07 18:25     ` Jonathan Cameron
2026-05-05 17:30 ` [PATCH v17 10/11] PCI/CXL: Mask/Unmask CXL protocol errors Terry Bowman
2026-05-06  1:01   ` sashiko-bot
2026-05-06 18:00   ` Dave Jiang
2026-05-11 21:04     ` Bowman, Terry
2026-05-11 22:36       ` Dave Jiang
2026-05-07 18:29   ` Jonathan Cameron
2026-05-05 17:30 ` [PATCH v17 11/11] Documentation: cxl: Document CXL protocol error handling Terry Bowman
2026-05-06 18:34   ` Dave Jiang
2026-05-07 18:51   ` Jonathan Cameron

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