From: Rob Herring <robh@kernel.org>
To: Billy Tsai <billy_tsai@aspeedtech.com>
Cc: Lee Jones <lee@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
Linus Walleij <linusw@kernel.org>,
Bartosz Golaszewski <brgl@kernel.org>,
Ryan Chen <ryan_chen@aspeedtech.com>,
Andrew Jeffery <andrew@aj.id.au>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org,
openbmc@lists.ozlabs.org, linux-gpio@vger.kernel.org,
linux-clk@vger.kernel.org
Subject: Re: [PATCH v8 1/3] dt-bindings: pinctrl: Add aspeed,ast2700-soc0-pinctrl
Date: Tue, 5 May 2026 20:29:40 -0500 [thread overview]
Message-ID: <20260506012940.GA258045-robh@kernel.org> (raw)
In-Reply-To: <20260428-upstream_pinctrl-v8-1-eb8ef9ab0498@aspeedtech.com>
On Tue, Apr 28, 2026 at 05:49:45PM +0800, Billy Tsai wrote:
> Add a device tree binding for the pin controller found in the
> ASPEED AST2700 SoC0.
>
> The controller manages various peripheral functions such as eMMC, USB,
> VGA DDC, JTAG, and PCIe root complex signals.
>
> Describe the AST2700 SoC0 pin controller using standard pin multiplexing
> and configuration properties.
>
> Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
> ---
> .../pinctrl/aspeed,ast2700-soc0-pinctrl.yaml | 187 +++++++++++++++++++++
> 1 file changed, 187 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml
> new file mode 100644
> index 000000000000..ef500209d81e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml
> @@ -0,0 +1,187 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2700-soc0-pinctrl.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: ASPEED AST2700 SoC0 Pin Controller
> +
> +maintainers:
> + - Billy Tsai <billy_tsai@aspeedtech.com>
> +
> +description:
Need '>' if you have paragraphs.
> + The AST2700 features a dual-SoC architecture with two interconnected SoCs,
> + each having its own System Control Unit (SCU) for independent pin control.
> + This pin controller manages the pin multiplexing for SoC0.
> +
> + The SoC0 pin controller manages pin functions including eMMC, VGA DDC,
> + dual USB3/USB2 ports (A and B), JTAG, and PCIe root complex interfaces.
> +
> +properties:
> + compatible:
> + const: aspeed,ast2700-soc0-pinctrl
blank line
> + reg:
> + maxItems: 1
> +
> +patternProperties:
> + '-state$':
> + description: |
> + Pin control state.
> +
> + If `function` is present, the node describes a pinmux state and must
Use regular quotes.
> + specify `groups`.
> +
> + For pin configuration, exactly one of `groups` or `pins` must be
> + specified in each state node. Group-level configuration applies to all
> + pins in the group. Pin-level configuration may be supplied in a
> + separate state node for individual pins; when both group-level and
> + pin-level configuration apply to the same pin, the pin-level
> + configuration takes precedence.
> +
> + type: object
> + allOf:
> + - $ref: pinmux-node.yaml#
> + - $ref: pincfg-node.yaml#
> + - if:
> + required:
> + - function
> + then:
> + required:
> + - groups
> + - oneOf:
> + - required:
> + - groups
> + - required:
> + - pins
> +
> + additionalProperties: false
> +
> + properties:
> + function:
> + enum:
> + - EMMC
> + - JTAGDDR
> + - JTAGM0
> + - JTAGPCIEA
> + - JTAGPCIEB
> + - JTAGPSP
> + - JTAGSSP
> + - JTAGTSP
> + - JTAGUSB3A
> + - JTAGUSB3B
> + - PCIERC0PERST
> + - PCIERC1PERST
> + - TSPRSTN
> + - UFSCLKI
> + - USB2AD0
> + - USB2AD1
> + - USB2AH
> + - USB2AHP
> + - USB2AHPD0
> + - USB2AXH
> + - USB2AXH2B
> + - USB2AXHD1
> + - USB2AXHP
> + - USB2AXHP2B
> + - USB2AXHPD1
> + - USB2BD0
> + - USB2BD1
> + - USB2BH
> + - USB2BHP
> + - USB2BHPD0
> + - USB2BXH
> + - USB2BXH2A
> + - USB2BXHD1
> + - USB2BXHP
> + - USB2BXHP2A
> + - USB2BXHPD1
> + - USB3AXH
> + - USB3AXH2B
> + - USB3AXHD
> + - USB3AXHP
> + - USB3AXHP2B
> + - USB3AXHPD
> + - USB3BXH
> + - USB3BXH2A
> + - USB3BXHD
> + - USB3BXHP
> + - USB3BXHP2A
> + - USB3BXHPD
> + - VB
> + - VGADDC
> +
> + groups:
> + enum:
> + - EMMCCDN
> + - EMMCG1
> + - EMMCG4
> + - EMMCG8
> + - EMMCWPN
> + - JTAG0
> + - PCIERC0PERST
> + - PCIERC1PERST
> + - TSPRSTN
> + - UFSCLKI
> + - USB2A
> + - USB2AAP
> + - USB2ABP
> + - USB2ADAP
> + - USB2AH
> + - USB2AHAP
> + - USB2B
> + - USB2BAP
> + - USB2BBP
> + - USB2BDBP
> + - USB2BH
> + - USB2BHBP
> + - USB3A
> + - USB3AAP
> + - USB3ABP
> + - USB3B
> + - USB3BAP
> + - USB3BBP
> + - VB0
> + - VB1
> + - VGADDC
> +
> + pins:
> + enum:
> + - AB13
> + - AB14
> + - AC13
> + - AC14
> + - AD13
> + - AD14
> + - AE13
> + - AE14
> + - AE15
> + - AF13
> + - AF14
> + - AF15
> +
> + drive-strength:
> + enum: [3, 6, 8, 11, 16, 18, 20, 23, 30, 32, 33, 35, 37, 38, 39, 41]
> +
> + bias-disable: true
> + bias-pull-up: true
> + bias-pull-down: true
> +
> +required:
> + - compatible
> + - reg
> +
> +allOf:
> + - $ref: pinctrl.yaml#
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + pinctrl@400 {
> + compatible = "aspeed,ast2700-soc0-pinctrl";
> + reg = <0x400 0x318>;
> + emmc-state {
> + function = "EMMC";
> + groups = "EMMCG1";
> + };
> + };
>
> --
> 2.34.1
>
next prev parent reply other threads:[~2026-05-06 1:29 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-28 9:49 [PATCH v8 0/3] pinctrl: aspeed: Add AST2700 SoC0 support Billy Tsai
2026-04-28 9:49 ` [PATCH v8 1/3] dt-bindings: pinctrl: Add aspeed,ast2700-soc0-pinctrl Billy Tsai
2026-05-06 1:29 ` Rob Herring [this message]
2026-04-28 9:49 ` [PATCH v8 2/3] dt-bindings: mfd: aspeed,ast2x00-scu: Describe AST2700 SCU0 Billy Tsai
2026-05-06 1:31 ` Rob Herring (Arm)
2026-05-14 14:13 ` (subset) " Lee Jones
2026-04-28 9:49 ` [PATCH v8 3/3] pinctrl: aspeed: Add AST2700 SoC0 support Billy Tsai
2026-04-29 1:56 ` [PATCH v8 0/3] " Stephen Boyd
2026-04-29 9:44 ` Billy Tsai
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260506012940.GA258045-robh@kernel.org \
--to=robh@kernel.org \
--cc=andrew@aj.id.au \
--cc=andrew@codeconstruct.com.au \
--cc=billy_tsai@aspeedtech.com \
--cc=brgl@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=joel@jms.id.au \
--cc=krzk+dt@kernel.org \
--cc=lee@kernel.org \
--cc=linusw@kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-aspeed@lists.ozlabs.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=openbmc@lists.ozlabs.org \
--cc=ryan_chen@aspeedtech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.