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[124.158.97.178]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-83967dbd995sm7930951b3a.43.2026.05.07.05.05.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 05:05:33 -0700 (PDT) From: Nicholas Piggin To: Corey Minyard Cc: Nicholas Piggin , Alistair Francis , Daniel Henrique Barboza , Chao Liu , Chris Rauer , Michael Ellerman , Joel Stanley , Anirudh Srinivasan , Portia Stephens , qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Hao Wu , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH 0/4] hw/i2c: Add designware i2c controller Date: Thu, 7 May 2026 22:05:18 +1000 Message-ID: <20260507120524.111056-1-npiggin@gmail.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=npiggin@gmail.com; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi, This series contains the DW I2C model written by Chris Rauer and updated for the Tenstorrent Atlantis machine recently. There was some more review comment on that submission and so we decided to take the I2C device out of that series and work on it separately, see here: https://lore.kernel.org/qemu-devel/20260425131721.932250-1-joel@jms.id.au/T/#mb1ef2824c2f1f37bf4574dc1ef0fb95566c3a2f2 The big thing suggested was to move to the QEMU register API. That is a big change and difficult to review, so I have split that and a some smaller changes out into their own patches. I don't expect detailed reviews on the register API patch -- it's quite mechanical and I did attempt to verify it by diff'ing register traces. But it would be good to make sure maintainers are happy to go that way. Unfortunately the patch 1 was quite well reviewed and tested so incremental changes would be preferable, but it is painful to maintain migration compatibility across these changes. Thanks, Nick Chris Rauer (1): hw/i2c: Add designware i2c controller Nicholas Piggin (3): [RFC] hw/i2c/designware_i2c: Switch to Fifo8 [RFC] hw/i2c/designware_i2c: Switch to QEMU register API [RFC] hw/i2c/designware_i2c: add SMBUS_INTR_MASK MAINTAINERS | 8 + hw/i2c/Kconfig | 5 + hw/i2c/designware_i2c.c | 742 ++++++++++++++++++++++++++++++++ hw/i2c/meson.build | 1 + hw/i2c/trace-events | 4 + include/hw/i2c/designware_i2c.h | 56 +++ roms/seabios-hppa | 2 +- 7 files changed, 817 insertions(+), 1 deletion(-) create mode 100644 hw/i2c/designware_i2c.c create mode 100644 include/hw/i2c/designware_i2c.h -- 2.53.0