From: Jason Gunthorpe <jgg@nvidia.com>
To: Pranjal Shrivastava <praan@google.com>
Cc: iommu@lists.linux.dev, Jonathan Hunter <jonathanh@nvidia.com>,
Joerg Roedel <joro@8bytes.org>,
linux-arm-kernel@lists.infradead.org,
linux-tegra@vger.kernel.org, Robin Murphy <robin.murphy@arm.com>,
Thierry Reding <thierry.reding@kernel.org>,
Krishna Reddy <vdumpa@nvidia.com>, Will Deacon <will@kernel.org>,
David Matlack <dmatlack@google.com>,
Pasha Tatashin <pasha.tatashin@soleen.com>,
patches@lists.linux.dev, Samiullah Khawaja <skhawaja@google.com>,
Mostafa Saleh <smostafa@google.com>
Subject: Re: [PATCH 6/9] iommu/arm-smmu-v3: Directly encode simple commands
Date: Fri, 8 May 2026 14:37:36 -0300 [thread overview]
Message-ID: <20260508173736.GH9254@nvidia.com> (raw)
In-Reply-To: <af3KDBt8vhClSKEF@google.com>
On Fri, May 08, 2026 at 11:33:32AM +0000, Pranjal Shrivastava wrote:
> > -static int __arm_smmu_cmdq_issue_cmd(struct arm_smmu_device *smmu,
> > - struct arm_smmu_cmd *cmd,
> > - bool sync)
> > +static int arm_smmu_cmdq_issue_cmd_p(struct arm_smmu_device *smmu,
> > + struct arm_smmu_cmd *cmd, bool sync)
>
> Nit: I'm not sure why we need to rename this? We can still define the
> rest of the helpers like:
I made it have the same naming system as this:
> > +static void arm_smmu_cmdq_batch_add_cmd_p(struct arm_smmu_device *smmu,
> > + struct arm_smmu_cmdq_batch *cmds,
> > + struct arm_smmu_cmd *cmd)
>
> Nit: Same here, why not __arm_smmu_cmdq_batch_add_cmd? I understand
> that _p just means we'll aceept ptr.. but the name's kinda wonky.
Which becomes a fairly widly used public entry point, so I didn't want
to have the __
Though there is no external user of arm_smmu_cmdq_issue_cmd_p()
> > static irqreturn_t arm_smmu_priq_thread(int irq, void *dev)
> > @@ -3464,7 +3405,7 @@ static void arm_smmu_inv_flush_iotlb_tag(struct arm_smmu_inv *inv)
> >
> > cmd.opcode = inv->nsize_opcode;
> > arm_smmu_cmdq_build_cmd(&hw_cmd, &cmd);
> > - arm_smmu_cmdq_issue_cmd_with_sync(inv->smmu, &hw_cmd);
> > + arm_smmu_cmdq_issue_cmd_with_sync(inv->smmu, hw_cmd);
>
> Nit: are we passing it by value here? This would be a 16-byte stack
> copy? As with the macro expansion this looks like:
>
> {
> struct arm_smmu_cmd __cmd = hw_cmd; // <-- Redundant 16-byte copy
> arm_smmu_cmdq_issue_cmd_p(inv->smmu, &__cmd, true);
> }
>
> Why not use arm_smmu_cmdq_issue_cmd_p(inv->smmu, &hw_cmd, true) ?
> Although, I see this is eventually cleaned up in Patch 9.
Because it is eventually cleaned up in patch 9 :) The point was not to
change this logic in this patch.
> > +static inline struct arm_smmu_cmd arm_smmu_make_cmd_cfgi_all(void)
> > +{
> > + struct arm_smmu_cmd cmd = arm_smmu_make_cmd_op(CMDQ_OP_CFGI_ALL);
> > +
> > + cmd.data[1] |= FIELD_PREP(CMDQ_CFGI_1_RANGE, 31);
>
> Maybe this is a good opportunity to define "31"? We already have a
> similar definition for TLBI: #define CMDQ_TLBI_RANGE_NUM_MAX 31
I went with how the spec was written. The CMD_CFGI_ALL has its own section
with a direct encoding of 31 in that position, no field name.
While CMD_CFGI_STE_RANGE has the same op code and names that spot
"range" and it would be a NUM_MAX, we don't use STE_RANGE..
I'm inclined to leave it for someone who adds STE_RANGE..
Jason
next prev parent reply other threads:[~2026-05-08 17:37 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-01 14:29 [PATCH 0/9] Remove SMMUv3 struct arm_smmu_cmdq_ent Jason Gunthorpe
2026-05-01 14:29 ` [PATCH 1/9] iommu/arm-smmu-v3: Add struct arm_smmu_cmd to represent the HW format command Jason Gunthorpe
2026-05-06 6:11 ` Nicolin Chen
2026-05-06 23:41 ` Samiullah Khawaja
2026-05-07 9:19 ` Mostafa Saleh
2026-05-08 7:29 ` Pranjal Shrivastava
2026-05-01 14:29 ` [PATCH 2/9] iommu/arm-smmu-v3: Use the HW arm_smmu_cmd in cmdq selection functions Jason Gunthorpe
2026-05-07 9:21 ` Mostafa Saleh
2026-05-08 15:49 ` Jason Gunthorpe
2026-05-08 7:47 ` Pranjal Shrivastava
2026-05-08 15:54 ` Jason Gunthorpe
2026-05-08 16:58 ` Pranjal Shrivastava
2026-05-01 14:29 ` [PATCH 3/9] iommu/arm-smmu-v3: Use the HW arm_smmu_cmd in cmdq submission functions Jason Gunthorpe
2026-05-07 9:21 ` Mostafa Saleh
2026-05-08 8:27 ` Pranjal Shrivastava
2026-05-08 16:00 ` Jason Gunthorpe
2026-05-08 17:00 ` Pranjal Shrivastava
2026-05-01 14:29 ` [PATCH 4/9] iommu/arm-smmu-v3: Convert arm_smmu_cmdq_batch cmds to struct arm_smmu_cmd Jason Gunthorpe
2026-05-07 9:22 ` Mostafa Saleh
2026-05-08 9:26 ` Pranjal Shrivastava
2026-05-01 14:29 ` [PATCH 5/9] iommu/arm-smmu-v3: Remove CMDQ_OP_CFGI_CD_ALL from arm_smmu_cmdq_build_cmd() Jason Gunthorpe
2026-05-07 9:22 ` Mostafa Saleh
2026-05-08 9:45 ` Pranjal Shrivastava
2026-05-08 16:02 ` Jason Gunthorpe
2026-05-08 17:17 ` Pranjal Shrivastava
2026-05-01 14:29 ` [PATCH 6/9] iommu/arm-smmu-v3: Directly encode simple commands Jason Gunthorpe
2026-05-07 9:22 ` Mostafa Saleh
2026-05-08 11:33 ` Pranjal Shrivastava
2026-05-08 17:37 ` Jason Gunthorpe [this message]
2026-05-08 20:09 ` Pranjal Shrivastava
2026-05-08 23:36 ` Jason Gunthorpe
2026-05-10 18:59 ` Pranjal Shrivastava
2026-05-01 14:29 ` [PATCH 7/9] iommu/arm-smmu-v3: Directly encode CMDQ_OP_ATC_INV Jason Gunthorpe
2026-05-07 9:23 ` Mostafa Saleh
2026-05-08 11:46 ` Pranjal Shrivastava
2026-05-09 16:54 ` Jason Gunthorpe
2026-05-11 10:34 ` Pranjal Shrivastava
2026-05-01 14:29 ` [PATCH 8/9] iommu/arm-smmu-v3: Directly encode CMDQ_OP_SYNC Jason Gunthorpe
2026-05-07 9:23 ` Mostafa Saleh
2026-05-08 13:41 ` Pranjal Shrivastava
2026-05-01 14:29 ` [PATCH 9/9] iommu/arm-smmu-v3: Directly encode TLBI commands Jason Gunthorpe
2026-05-07 9:24 ` Mostafa Saleh
2026-05-08 14:00 ` Pranjal Shrivastava
2026-05-07 9:26 ` [PATCH 0/9] Remove SMMUv3 struct arm_smmu_cmdq_ent Mostafa Saleh
2026-05-08 14:03 ` Pranjal Shrivastava
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