From: sashiko-bot@kernel.org
To: "Jian Hu via B4 Relay" <devnull+jian.hu.amlogic.com@kernel.org>
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 08/10] clk: amlogic: Add A9 PLL clock controller driver
Date: Tue, 12 May 2026 05:56:24 +0000 [thread overview]
Message-ID: <20260512055625.82724C2BCB0@smtp.kernel.org> (raw)
In-Reply-To: <20260511-b4-a9_clk-v1-8-41cb4071b7c9@amlogic.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The new driver file `drivers/clk/meson/a9-pll.c` uses module-specific macros but fails to include `<linux/module.h>`.
--
commit 497c46fd6ed69111b1539ecfa46cd63980fab5e1
Author: Jian Hu <jian.hu@amlogic.com>
clk: amlogic: Add A9 PLL clock controller driver
This commit adds the PLL clock controller driver for the Amlogic A9 SoC
family.
> diff --git a/drivers/clk/meson/a9-pll.c b/drivers/clk/meson/a9-pll.c
> new file mode 100644
> index 0000000000000..84b591c3afff5
> --- /dev/null
> +++ b/drivers/clk/meson/a9-pll.c
> @@ -0,0 +1,831 @@
> +// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
> +/*
> + * Copyright (C) 2026 Amlogic, Inc. All rights reserved
> + */
> +
> +#include <linux/clk-provider.h>
> +#include <linux/platform_device.h>
> +#include <dt-bindings/clock/amlogic,a9-pll-clkc.h>
> +#include "clk-regmap.h"
> +#include "clk-pll.h"
> +#include "meson-clkc-utils.h"
[ ... ]
> +MODULE_DEVICE_TABLE(of, a9_pll_clkc_match_table);
> +
> +static struct platform_driver a9_pll_clkc_driver = {
> + .probe = meson_clkc_mmio_probe,
> + .driver = {
> + .name = "a9-pll-clkc",
> + .of_match_table = a9_pll_clkc_match_table,
> + },
> +};
> +module_platform_driver(a9_pll_clkc_driver);
> +
> +MODULE_DESCRIPTION("Amlogic A9 PLL Clock Controller Driver");
> +MODULE_AUTHOR("Jian Hu <jian.hu@amlogic.com>");
> +MODULE_LICENSE("GPL");
> +MODULE_IMPORT_NS("CLK_MESON");
Should linux/module.h be included in this file since it uses several
module-specific macros?
Relying on implicit inclusion via other headers like linux/platform_device.h
can sometimes lead to build failures on different architectures or in future
kernel versions if header dependencies change.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260511-b4-a9_clk-v1-0-41cb4071b7c9@amlogic.com?part=8
next prev parent reply other threads:[~2026-05-12 5:56 UTC|newest]
Thread overview: 114+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-11 12:47 [PATCH 00/10] Add support for A9 family clock controller Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu
2026-05-11 12:47 ` [PATCH 01/10] dt-bindings: clock: Add Amlogic A9 SCMI " Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu
2026-05-11 12:47 ` [PATCH 02/10] dt-bindings: clock: Add Amlogic A9 PLL " Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu
2026-05-12 4:18 ` sashiko-bot
2026-05-15 8:09 ` Krzysztof Kozlowski
2026-05-15 8:09 ` Krzysztof Kozlowski
2026-05-22 6:20 ` Jian Hu
2026-05-22 6:20 ` Jian Hu
2026-05-22 9:16 ` Krzysztof Kozlowski
2026-05-22 9:16 ` Krzysztof Kozlowski
2026-05-22 11:44 ` Jian Hu
2026-05-22 11:44 ` Jian Hu
2026-05-11 12:47 ` [PATCH 03/10] dt-bindings: clock: Add Amlogic A9 peripherals " Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu
2026-05-14 16:15 ` Jerome Brunet
2026-05-14 16:15 ` Jerome Brunet
2026-05-20 3:16 ` Jian Hu
2026-05-20 3:16 ` Jian Hu
2026-05-15 8:10 ` Krzysztof Kozlowski
2026-05-15 8:10 ` Krzysztof Kozlowski
2026-05-22 7:49 ` Jian Hu
2026-05-22 7:49 ` Jian Hu
2026-05-11 12:47 ` [PATCH 04/10] dt-bindings: clock: Add Amlogic A9 AO " Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu
2026-05-15 8:10 ` Krzysztof Kozlowski
2026-05-15 8:10 ` Krzysztof Kozlowski
2026-05-22 8:14 ` Jian Hu
2026-05-22 8:14 ` Jian Hu
2026-05-11 12:47 ` [PATCH 05/10] clk: amlogic: PLL l_detect signal supports active-high configuration Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu
2026-05-11 15:47 ` Brian Masney
2026-05-11 15:47 ` Brian Masney
2026-05-14 15:13 ` Jerome Brunet
2026-05-14 15:13 ` Jerome Brunet
2026-05-20 3:25 ` Jian Hu
2026-05-20 3:25 ` Jian Hu
2026-05-20 7:24 ` Jerome Brunet
2026-05-20 7:24 ` Jerome Brunet
2026-05-20 8:46 ` Jian Hu
2026-05-20 8:46 ` Jian Hu
2026-05-11 12:47 ` [PATCH 06/10] clk: amlogic: PLL reset signal supports active-low configuration Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu
2026-05-11 15:21 ` Brian Masney
2026-05-11 15:21 ` Brian Masney
2026-05-13 3:53 ` Jian Hu
2026-05-13 3:53 ` Jian Hu
2026-05-12 4:48 ` sashiko-bot
2026-05-14 15:16 ` Jerome Brunet
2026-05-14 15:16 ` Jerome Brunet
2026-05-20 3:35 ` Jian Hu
2026-05-20 3:35 ` Jian Hu
2026-05-11 12:47 ` [PATCH 07/10] clk: amlogic: Support POWER_OF_TWO for PLL pre-divider Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu
2026-05-11 15:23 ` Brian Masney
2026-05-11 15:23 ` Brian Masney
2026-05-14 15:11 ` Jerome Brunet
2026-05-14 15:11 ` Jerome Brunet
2026-05-20 5:47 ` Jian Hu
2026-05-20 5:47 ` Jian Hu
2026-05-20 7:35 ` Jerome Brunet
2026-05-20 7:35 ` Jerome Brunet
2026-05-26 9:58 ` Jian Hu
2026-05-26 9:58 ` Jian Hu
2026-05-26 12:27 ` Jerome Brunet
2026-05-26 12:27 ` Jerome Brunet
2026-05-29 7:08 ` Jian Hu
2026-05-29 7:08 ` Jian Hu
2026-05-11 12:47 ` [PATCH 08/10] clk: amlogic: Add A9 PLL clock controller driver Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu
2026-05-11 15:36 ` Brian Masney
2026-05-11 15:36 ` Brian Masney
2026-05-13 7:25 ` Jian Hu
2026-05-13 7:25 ` Jian Hu
2026-05-12 5:56 ` sashiko-bot [this message]
2026-05-14 16:12 ` Jerome Brunet
2026-05-14 16:12 ` Jerome Brunet
2026-05-20 7:33 ` Jian Hu
2026-05-20 7:33 ` Jian Hu
2026-05-11 12:47 ` [PATCH 09/10] clk: amlogic: Add A9 peripherals " Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu
2026-05-11 15:42 ` Brian Masney
2026-05-11 15:42 ` Brian Masney
2026-05-13 8:50 ` Jian Hu
2026-05-13 8:50 ` Jian Hu
2026-05-12 6:18 ` sashiko-bot
2026-05-11 12:47 ` [PATCH 10/10] clk: amlogic: Add A9 AO " Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu via B4 Relay
2026-05-11 12:47 ` Jian Hu
2026-05-11 15:45 ` Brian Masney
2026-05-11 15:45 ` Brian Masney
2026-05-13 9:19 ` Jian Hu
2026-05-13 9:19 ` Jian Hu
2026-05-12 20:47 ` sashiko-bot
2026-05-14 16:27 ` Jerome Brunet
2026-05-14 16:27 ` Jerome Brunet
2026-05-20 7:37 ` Jian Hu
2026-05-20 7:37 ` Jian Hu
2026-05-26 7:33 ` [PATCH 00/10] Add support for A9 family clock controller Jerome Brunet
2026-05-26 7:33 ` Jerome Brunet
2026-05-26 10:05 ` Jian Hu
2026-05-26 10:05 ` Jian Hu
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