From: sashiko-bot@kernel.org
To: "Tanmay Kathpalia" <tanmay.kathpalia@altera.com>
Cc: krzk+dt@kernel.org, devicetree@vger.kernel.org,
conor+dt@kernel.org, robh@kernel.org
Subject: Re: [PATCH v1 5/9] arm64: dts: agilex5: add SOCDK eMMC daughter board support
Date: Wed, 13 May 2026 01:22:39 +0000 [thread overview]
Message-ID: <20260513012239.8FB2AC2BCB0@smtp.kernel.org> (raw)
In-Reply-To: <20260511202132.5597-6-tanmay.kathpalia@altera.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] The `no-1-8-v` property in the `&emmc` node explicitly disables the 1.8V HS200 and HS400 modes, contradicting the commit intent.
- [Medium] A board-specific fixed regulator (`emmc_io_1v8_reg`) is improperly defined in the shared SoC-level `.dtsi` file and placed under a memory-mapped bus.
--
commit 832d2f01748902348b5ee8ddc2a87d8dfab30896
Author: Tanmay Kathpalia <tanmay.kathpalia@altera.com>
arm64: dts: agilex5: add SOCDK eMMC daughter board support
This commit adds device tree support for the Agilex5 SOCDK eMMC daughter
board. It introduces the new board dts file and adds a fixed 1.8V regulator
for the eMMC I/O voltage to the common SoC dtsi.
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> index 7e080f13166f2..feb4ccb317a71 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
[ ... ]
> @@ -317,6 +317,14 @@ sd_io_1v8_reg: regulator-1p8v {
> <3300000 0x0>;
> };
>
> + emmc_io_1v8_reg: regulator-fixed-1p8v {
> + compatible = "regulator-fixed";
> + regulator-name = "emmc-io-power";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <1800000>;
> + regulator-always-on;
> + };
> +
Will this cause every Agilex 5 board to inadvertently instantiate and enable
this regulator, even if they do not have the eMMC daughter card attached?
Since this appears to be a board-specific regulator, would it be better
placed at the root level of the board-specific socfpga_agilex5_socdk_emmc.dts
file?
Additionally, does placing this node inside a memory-mapped bus without a reg
property trigger device tree compiler warnings?
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_emmc.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_emmc.dts
> new file mode 100644
> index 0000000000000..87bde9fa69c6c
> --- /dev/null
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_emmc.dts
[ ... ]
> +&emmc {
> + status = "okay";
> +
> + no-sd;
> + no-sdio;
> + no-1-8-v;
The commit message states the eMMC controller is configured for HS200 and
HS400 modes at 1.8V. Does the no-1-8-v property prevent these high-speed
modes from functioning?
In the SDHCI core, parsing no-1-8-v sets the SDHCI_QUIRK2_NO_1_8_V flag,
which strips out the MMC_CAP2_HSX00_1_8V and MMC_CAP2_HS400_ES capabilities
during host setup. Since the eMMC IO is explicitly supplied by a 1.8V
regulator, shouldn't this property be removed to allow HS200 and HS400
negotiation?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260511202132.5597-1-tanmay.kathpalia@altera.com?part=5
next prev parent reply other threads:[~2026-05-13 1:22 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-11 20:21 [PATCH v1 0/9] mmc: sdhci-cadence: add SD6HC support and Agilex5 enablement Tanmay Kathpalia
2026-05-11 20:21 ` [PATCH v1 1/9] dt-bindings: reset: altr: add COMBOPHY_RESET for Agilex5 Tanmay Kathpalia
2026-05-12 17:33 ` Conor Dooley
2026-05-11 20:21 ` [PATCH v1 2/9] dt-bindings: mmc: cdns,sdhci: add SD6HC support and PHY properties Tanmay Kathpalia
2026-05-12 17:33 ` Conor Dooley
2026-05-13 0:23 ` sashiko-bot
2026-05-11 20:21 ` [PATCH v1 3/9] arm64: dts: agilex5: add Cadence SD6HC controller and SOCDK enablement Tanmay Kathpalia
2026-05-13 0:43 ` sashiko-bot
2026-05-13 6:34 ` Kathpalia, Tanmay
2026-05-15 8:38 ` Krzysztof Kozlowski
2026-05-21 17:56 ` Kathpalia, Tanmay
2026-05-11 20:21 ` [PATCH v1 4/9] dt-bindings: arm: intel: add Agilex5 SOCDK eMMC board variant Tanmay Kathpalia
2026-05-11 20:21 ` [PATCH v1 5/9] arm64: dts: agilex5: add SOCDK eMMC daughter board support Tanmay Kathpalia
2026-05-13 1:22 ` sashiko-bot [this message]
2026-05-13 6:25 ` Kathpalia, Tanmay
2026-05-15 8:37 ` Krzysztof Kozlowski
2026-05-22 6:30 ` Kathpalia, Tanmay
2026-05-11 20:21 ` [PATCH v1 6/9] mmc: sdhci-cadence: rename V4 functions for V6 controller groundwork Tanmay Kathpalia
2026-05-19 15:29 ` Adrian Hunter
2026-05-21 15:53 ` Kathpalia, Tanmay
2026-05-21 16:16 ` Adrian Hunter
2026-05-11 20:21 ` [PATCH v1 7/9] mmc: sdhci-cadence: refactor driver structure for V6 controller support Tanmay Kathpalia
2026-05-19 15:29 ` Adrian Hunter
2026-05-21 17:41 ` Kathpalia, Tanmay
2026-05-11 20:21 ` [PATCH v1 8/9] mmc: sdhci-cadence: add Cadence SD6HC support Tanmay Kathpalia
2026-05-19 15:29 ` Adrian Hunter
2026-05-21 17:28 ` Kathpalia, Tanmay
2026-05-22 5:32 ` Adrian Hunter
2026-05-22 6:34 ` Kathpalia, Tanmay
2026-05-11 20:21 ` [PATCH v1 9/9] mmc: sdhci-cadence: add Altera Agilex5 " Tanmay Kathpalia
2026-05-27 21:01 ` Zach Miller
2026-06-01 11:54 ` Kathpalia, Tanmay
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