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[47.54.130.67]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8c90c358539sm710716d6.41.2026.05.13.10.10.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 13 May 2026 10:10:59 -0700 (PDT) Received: from jgg by wakko with local (Exim 4.97) (envelope-from ) id 1wND6p-00000003cRB-0Am8; Wed, 13 May 2026 14:10:59 -0300 Date: Wed, 13 May 2026 14:10:59 -0300 From: Jason Gunthorpe To: Joonwon Kang Cc: Alexander.Grest@microsoft.com, amhetre@nvidia.com, baolu.lu@linux.intel.com, easwar.hariharan@linux.microsoft.com, iommu@lists.linux.dev, jacob.jun.pan@linux.intel.com, joro@8bytes.org, jpb@kernel.org, kees@kernel.org, kevin.tian@intel.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, nicolinc@nvidia.com, praan@google.com, robin.murphy@arm.com, smostafa@google.com, will@kernel.org Subject: Re: [PATCH RFC] iommu: Enable per-device SSID space for SVA Message-ID: <20260513171059.GP7702@ziepe.ca> References: <20260512151133.GD7702@ziepe.ca> <20260513170333.1235601-1-joonwonkang@google.com> Precedence: bulk X-Mailing-List: iommu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260513170333.1235601-1-joonwonkang@google.com> On Wed, May 13, 2026 at 05:03:33PM +0000, Joonwon Kang wrote: > > On Tue, May 12, 2026 at 02:51:38PM +0000, Joonwon Kang wrote: > > > > > Appreciate all your clarifications here. So, my understanding is that if > > > our system does not support ST64BV and ST64BV0 or if our device does not > > > distinguish between the posted write and the non-posted write regarding > > > PASID, then we can lift the use of the global PASID space. Can I say this? > > > > You should do what Robin said - just have your driver use a per-device > > PASID that it allocates and never use the global pasid allocator. > > > > To do this lightly re-organize the SVA code so the driver can supply > > its own PASID, and in this mode we wouldn't activate the ENQCMD > > features in the mm. > > Ah, we could actively disallow EL0 to execute ENQCMD-like instructions > when the device driver explicitly shows the intention via a new API like > `iommu_sva_bind_device_pasid()` that Tian mentioned earlier. You shouldn't need to do anything like this. All you need is to ensure that mm_get_enqcmd_pasid() returns IOMMU_PASID_INVALID so long as a the normal iommu_sva_bind_device() hasn't been called. Once it is called it is fine to allow the ENQCMD. Your new iommu_sva_bind_device_pasid() needs to establish the SVA and attach it without triggering mm_get_enqcmd_pasid(). The arch code is required to block the ENQCMD like instructions when IOMMU_PASID_INVALID. Devices that can mmap an ENQCMD sensitive BAR region must not do so unless iommu_sva_bind_device() has been called. > To allocate a per-device PASID, I think we should do it using > `dev->iommu_group->pasid_array` instead of making the device driver No, make the driver manage this, don't mess with the core code. PASID isn't supported with multi-device groups already. Jason