From: sashiko-bot@kernel.org
To: "Tomi Valkeinen" <tomi.valkeinen+renesas@ideasonboard.com>
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
devicetree@vger.kernel.org, wsa+renesas@sang-engineering.com
Subject: Re: [PATCH 2/5] dt-bindings: display: bridge: Document Renesas R-Car V4H DSC bindings
Date: Thu, 14 May 2026 19:03:19 +0000 [thread overview]
Message-ID: <20260514190320.1FB0BC2BCB3@smtp.kernel.org> (raw)
In-Reply-To: <20260514-rcar-du-dsc-v1-2-d65f7a9e9841@ideasonboard.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] The device tree example will fail `dt_binding_check` because the `reg` property uses 4 cells without a parent node specifying `#address-cells = <2>` and `#size-cells = <2>`.
--
commit 6a7e60ed22b69bbc15e77243a1b4bdb0d60396df
Author: Marek Vasut <marek.vasut+renesas@mailbox.org>
dt-bindings: display: bridge: Document Renesas R-Car V4H DSC bindings
This commit adds the device tree binding documentation for the VESA DSC
Display Stream Compression encoder embedded in the Renesas R-Car V4H SoC.
> diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dsc.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,dsc.yaml
> new file mode 100644
> index 0000000000000..91245beb67d7b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsc.yaml
[ ... ]
> +examples:
> + - |
> + #include <dt-bindings/clock/r8a779g0-cpg-mssr.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/power/r8a779g0-sysc.h>
> +
> + dsc@feb8d000 {
> + compatible = "renesas,r8a779g0-dsc";
> + reg = <0 0xfeb8d000 0 0x400>;
Does this introduce a regression during dt_binding_check? By default, the
schema tooling wraps examples in a root node with #address-cells = <1> and
#size-cells = <1>.
Because the reg property uses 4 cells, it will be parsed as two items, which
violates the maxItems: 1 constraint defined earlier in the binding. Wrapping
the example in a parent node that specifies #address-cells = <2> and
#size-cells = <2> should resolve this.
> + interrupts = <GIC_SPI 559 IRQ_TYPE_LEVEL_HIGH>;
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260514-rcar-du-dsc-v1-0-d65f7a9e9841@ideasonboard.com?part=2
next prev parent reply other threads:[~2026-05-14 19:03 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-14 12:24 [PATCH 0/5] drm/rcar-du: Add support for DSI pipelines with DSC Tomi Valkeinen
2026-05-14 12:24 ` [PATCH 1/5] clk: renesas: r8a779g0: Add DSC clock Tomi Valkeinen
2026-05-14 12:24 ` [PATCH 2/5] dt-bindings: display: bridge: Document Renesas R-Car V4H DSC bindings Tomi Valkeinen
2026-05-14 13:47 ` Rob Herring (Arm)
2026-05-14 19:03 ` sashiko-bot [this message]
2026-05-14 12:24 ` [PATCH 3/5] drm/rcar-du: dsc: Add rudimentary Renesas R-Car V4H DSC driver Tomi Valkeinen
2026-05-14 19:26 ` sashiko-bot
2026-05-15 7:49 ` Geert Uytterhoeven
2026-05-15 8:02 ` Tomi Valkeinen
2026-05-15 8:05 ` Geert Uytterhoeven
2026-05-15 8:17 ` Tomi Valkeinen
2026-05-15 8:47 ` Geert Uytterhoeven
2026-05-15 9:29 ` Philipp Zabel
2026-05-14 12:24 ` [PATCH 4/5] drm/rcar-du: dsi: Support DSC in the pipeline Tomi Valkeinen
2026-05-14 12:24 ` [PATCH 5/5] arm64: dts: renesas: Add Renesas R-Car V4H DSC Tomi Valkeinen
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