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From: sashiko-bot@kernel.org
To: "Junhui Liu" <junhui.liu@pigmoral.tech>
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org,
	krzk+dt@kernel.org, robh@kernel.org
Subject: Re: [PATCH v5 4/6] reset: anlogic: add support for Anlogic DR1V90 resets
Date: Thu, 14 May 2026 19:32:18 +0000	[thread overview]
Message-ID: <20260514193219.219B6C2BCB3@smtp.kernel.org> (raw)
In-Reply-To: <20260514-dr1v90-cru-v5-4-34f3021aab51@pigmoral.tech>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] Implicit cast from generic address space `void *` to `void __iomem *`.
- [Low] Missing explicit inclusion of `<linux/module.h>`.
--

commit bd68e19d51efda3c5e694cc1c4ab7885341e64b4
Author: Junhui Liu <junhui.liu@pigmoral.tech>

reset: anlogic: add support for Anlogic DR1V90 resets

This commit adds reset controller support for the Anlogic DR1V90 SoC
using an auxiliary device associated with the Clock and Reset Unit (CRU).

> diff --git a/drivers/reset/reset-dr1v90.c b/drivers/reset/reset-dr1v90.c
> new file mode 100644
> index 0000000000000..daa99c797b1af
> --- /dev/null
> +++ b/drivers/reset/reset-dr1v90.c
> @@ -0,0 +1,140 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Copyright (C) 2026 Junhui Liu <junhui.liu@pigmoral.tech>
> + */
> +
> +#include <linux/auxiliary_bus.h>
> +#include <linux/cleanup.h>
> +#include <linux/device.h>
> +#include <linux/io.h>
> +#include <linux/reset-controller.h>
> +
> +#include <dt-bindings/reset/anlogic,dr1v90-cru.h>

This isn't a bug, but should linux/module.h be explicitly included here?
The driver heavily utilizes macros like MODULE_AUTHOR, MODULE_DESCRIPTION,
and module_auxiliary_driver, but seems to rely on implicit transitive inclusion
from other headers to provide them. 

[ ... ]

> +static int dr1v90_reset_probe(struct auxiliary_device *adev,
> +			      const struct auxiliary_device_id *id)
> +{
> +	struct dr1v90_reset_controller *rstc;
> +	struct device *dev = &adev->dev;
> +
> +	rstc = devm_kzalloc(dev, sizeof(*rstc), GFP_KERNEL);
> +	if (!rstc)
> +		return -ENOMEM;
> +
> +	spin_lock_init(&rstc->lock);
> +
> +	rstc->base = dev->platform_data;

Will this assignment trigger a Sparse warning? It looks like we are implicitly
casting a generic void pointer from dev->platform_data into the void __iomem
pointer at rstc->base. 

Would an explicit cast using (__force void __iomem *) be appropriate here
to prevent mixing address spaces?

> +	rstc->rcdev.dev = dev;
> +	rstc->rcdev.nr_resets = ARRAY_SIZE(dr1v90_resets);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260514-dr1v90-cru-v5-0-34f3021aab51@pigmoral.tech?part=4

  reply	other threads:[~2026-05-14 19:32 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-14  9:27 [PATCH v5 0/6] clk/reset: anlogic: add support for DR1V90 SoC Junhui Liu
2026-05-14  9:27 ` Junhui Liu
2026-05-14  9:27 ` [PATCH v5 1/6] clk: correct clk_div_mask() return value for width == 32 Junhui Liu
2026-05-14  9:27   ` Junhui Liu
2026-05-14 18:22   ` sashiko-bot
2026-05-14  9:27 ` [PATCH v5 2/6] dt-bindings: clock: add Anlogic DR1V90 CRU Junhui Liu
2026-05-14  9:27   ` Junhui Liu
2026-05-14  9:27 ` [PATCH v5 3/6] clk: anlogic: add cru support for Anlogic DR1V90 SoC Junhui Liu
2026-05-14  9:27   ` Junhui Liu
2026-05-14 18:52   ` sashiko-bot
2026-05-14  9:27 ` [PATCH v5 4/6] reset: anlogic: add support for Anlogic DR1V90 resets Junhui Liu
2026-05-14  9:27   ` Junhui Liu
2026-05-14 19:32   ` sashiko-bot [this message]
2026-05-14  9:27 ` [PATCH v5 5/6] riscv: dts: anlogic: add clocks and CRU for DR1V90 Junhui Liu
2026-05-14  9:27   ` Junhui Liu
2026-05-14 19:48   ` sashiko-bot
2026-05-15  3:02     ` Junhui Liu
2026-05-14  9:27 ` [PATCH v5 6/6] MAINTAINERS: Add Anlogic DR1V90 CRU driver entry Junhui Liu
2026-05-14  9:27   ` Junhui Liu

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