Re: [PATCH v2] arm64: dts: renesas: rzt2h-n2h-evk: Configure eMMC/SDHI pins

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [High] Adding pin configuration properties causes the MMC driver probe to fail because the pinctrl-rzt2h driver lacks pinconf support.
- [Medium] Card Detect (CD) pins are incorrectly grouped with CMD pins, inappropriately applying high-speed settings like 'input-schmitt-disable' to a mechanical switch input.
--

commit 90a6446de76af95b915ef59d0035481394029848
Author: Fabrizio Castro <fabrizio.castro.jz@renesas.com>

arm64: dts: renesas: rzt2h-n2h-evk: Configure eMMC/SDHI pins

This commit configures the eMMC and SDHI interface pins for the Renesas
RZ/T2H and RZ/N2H EVK. It adds drive strength, slew rate, and Schmitt
trigger settings for various bus modes.

> diff --git a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
> index 510399febf295..2b43852257974 100644
> --- a/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzt2h-n2h-evk-common.dtsi
> @@ -274,12 +274,63 @@ data-pins {
>  				 <RZT2H_PORT_PINMUX(12, 7, 0x29)>, /* SD0_DATA5 */
>  				 <RZT2H_PORT_PINMUX(13, 0, 0x29)>, /* SD0_DATA6 */
>  				 <RZT2H_PORT_PINMUX(13, 1, 0x29)>; /* SD0_DATA7 */
> +			drive-strength-microamp = <5000>;

Does adding these pin configuration properties cause the MMC driver probe to
fail?

It appears the pinctrl-rzt2h driver lacks pinconf support, as its
desc->confops is NULL.

When the MMC driver probes and attempts to select the default pin state,
pinctrl_commit_state() will call pinconf_apply_setting(). Because ops is NULL,
pinconf_apply_setting() logs "missing confops" and returns -EINVAL.

This structurally aborts the state transition, which would cause the eMMC
and SDHI interfaces to become completely unusable.

[ ... ]

> @@ -298,12 +349,49 @@ data-pins {
>  				 <RZT2H_PORT_PINMUX(12, 3, 0x29)>, /* SD0_DATA1 */
>  				 <RZT2H_PORT_PINMUX(12, 4, 0x29)>, /* SD0_DATA2 */
>  				 <RZT2H_PORT_PINMUX(12, 5, 0x29)>; /* SD0_DATA3 */
> +			drive-strength-microamp = <5000>;
> +			slew-rate = <1>;
> +			input-schmitt-disable;
> +		};
> +
> +		clk-pins {
> +			pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>; /* SD0_CLK */
> +			drive-strength-microamp = <9000>;
> +			slew-rate = <1>;
>  		};
>  
>  		ctrl-pins {
> -			pinmux = <RZT2H_PORT_PINMUX(12, 0, 0x29)>, /* SD0_CLK */
> -				 <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */
> +			pinmux = <RZT2H_PORT_PINMUX(12, 1, 0x29)>, /* SD0_CMD */
>  				 <RZT2H_PORT_PINMUX(22, 5, 0x29)>; /* SD0_CD */
> +			drive-strength-microamp = <5000>;
> +			slew-rate = <1>;
> +			input-schmitt-disable;
> +		};
> +	};

Is it safe to apply input-schmitt-disable to the Card Detect (SD0_CD) pin?

The Card Detect pin connects to a mechanical slot switch, which typically
experiences contact bounce during card insertion and removal. Schmitt triggers
are required to provide hysteresis and debounce such signals.

Disabling the Schmitt trigger on the CD pin removes this essential protection,
making the system susceptible to noise and false card detection interrupts.

Furthermore, configuring output properties like drive strength and slew rate
on a pure input pin seems semantically incorrect.

Should the CD pin be isolated into its own cd-pins subnode without these
high-speed properties, analogous to how SD0_RST# was correctly separated in
the eMMC configuration?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260514210220.7616-1-fabrizio.castro.jz@renesas.com?part=1