From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pg1-f202.google.com (mail-pg1-f202.google.com [209.85.215.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC4E03D1CD4 for ; Thu, 14 May 2026 21:54:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.202 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778795655; cv=none; b=ZfYSFIRy8Phs8op+nqrVd+Md93emAof2IOGART+PT7WXqwyalr+CpB1Lnq/u5/2/y6+JH5UdCaTwl10E3L7CdIgOM7+WYa6ckWNWsm9IdzuV0ryL49IKd/zJR0nxrHyCnc8cwcNYilh8pQHu9igXHMivqcY0NBx+BCP4U9Jdoys= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778795655; c=relaxed/simple; bh=DkYUZVCFxypYvjE+ECVjC8MTu+dU12DtdKyLPawOsdk=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=NRidlvpBfIszKcNPKY/Ok0yXHF20INnmOYz6yiU4GwvV/fiDzvmIXsbUC2OtgH8eufXRFb9nmF4z6W2gPRBJs2+9INO9PKu0FyCHmsTYVlcp5rsMSSLZSyF2opTk0NnxS2dAeoJlv7lqt67LhlOabHerNJrCN+xh7kl88bp0D9Q= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=PH8qIL3C; arc=none smtp.client-ip=209.85.215.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="PH8qIL3C" Received: by mail-pg1-f202.google.com with SMTP id 41be03b00d2f7-c828cee4fcdso3182830a12.3 for ; Thu, 14 May 2026 14:54:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1778795653; x=1779400453; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=brzyKoCEspwI0RWW9AziHqTrLPrrZVq/O92aCbmnfFc=; b=PH8qIL3CLryxPTb8Mv/w0e4IyPfIyUjFd5EoOPinf95d/zvvnNSDu5m4PRcAgva5Gn D6LKHngyMjGvLARykoqlTl+YdJHW2qzqCQt4ntaAtPTqgbstFXn481iPXUTI4xL4Jk8+ 1BFMiQkqR2lrL6B2TETYK53MnVaeODOh+0HqhLQkJ8yjj67sG+n1k5/RX+k3WVZ5EHGH EW09wm+UScPMndYzCTHE6+d69RmaVuf5uBqLa3V5B+4F2AvgYdpJ2UHBoSLeYXM756wX k4dUV/nWTQeaINvjN6LOYj+NAO2zWcovLix5c7fnItCOPWHtlnQvJWhrW7gHt07HLRC1 y0UQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778795653; x=1779400453; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=brzyKoCEspwI0RWW9AziHqTrLPrrZVq/O92aCbmnfFc=; b=nR2HHZEiODHi69Zi3F8uRmZ9OrGTGsabJHWs8bJYWVPcJ92tOTCEMJSci4CBWJ1DaR ooYRoeiz/X49VWcfW8b3qeLm8pUVrt/KtSTP2ZNedUngbOhlqBA5owEsJmUF1AvhnqJi SIMFrDaDJDLY/ODSh3jNhWjdt0p/CM6wWgg40OvKPLM/htgVRlu2VMgJhqpvdY7f5397 IYmP2lJXC/tFHZcDzvOc/5XZpo34q+wqyGGDDLg4QR2a6v1Jmn1QgPwq/UqQMpY+uTca zAxVmQFqyAvwZV1Pzxnaz0TrrNRFBzKMLrVvPLndGye1DYAXuDvUrRdspjwMSCq1zCzJ ihFA== X-Forwarded-Encrypted: i=1; AFNElJ/hFuIuTHdW8HJrvB9G7inbk3DWHYS0S+3jSRFXsmmQ635Pok4bJ6ePIvSNuGvfTGuCFJ+kAdiWbJW6TLE=@vger.kernel.org X-Gm-Message-State: AOJu0YyO35x0XCet52HsyNl8EBQdIR1MfvNhKmaG1K4cv/Q8payenuT1 9Ul2YmZJN4Kte75VzRaRO853hEUu3aVCZBFKozyxQghLmkJBVPnBerN4zXqvz2hB/5Jty0vrn2a 3zzxDXQ== X-Received: from pfoo22.prod.google.com ([2002:a05:6a00:1a16:b0:836:d115:1e44]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:94c4:b0:82c:212a:a9b5 with SMTP id d2e1a72fcca58-83f33d52d3cmr1204761b3a.36.1778795652618; Thu, 14 May 2026 14:54:12 -0700 (PDT) Reply-To: Sean Christopherson Date: Thu, 14 May 2026 14:53:54 -0700 In-Reply-To: <20260514215355.1648463-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260514215355.1648463-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260514215355.1648463-15-seanjc@google.com> Subject: [PATCH v2 14/15] KVM: x86: Move kvm_pv_async_pf_enabled() to x86.h (as an inline) From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini , Vitaly Kuznetsov , Kiryl Shutsemau , David Woodhouse , Paul Durrant Cc: Dave Hansen , Rick Edgecombe , kvm@vger.kernel.org, x86@kernel.org, linux-coco@lists.linux.dev, linux-kernel@vger.kernel.org, Yosry Ahmed , Kai Huang , Binbin Wu Content-Type: text/plain; charset="UTF-8" Move kvm_pv_async_pf_enabled() in anticipation of extracting the majority of register specific code out of x86.c. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/kvm/x86.c | 12 ------------ arch/x86/kvm/x86.h | 12 ++++++++++++ 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 1113a31978dd..e664e874973b 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1042,18 +1042,6 @@ bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr) } EXPORT_SYMBOL_FOR_KVM_INTERNAL(kvm_require_dr); -static bool __kvm_pv_async_pf_enabled(u64 data) -{ - u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT; - - return (data & mask) == mask; -} - -static bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu) -{ - return __kvm_pv_async_pf_enabled(vcpu->arch.apf.msr_en_val); -} - static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu) { return vcpu->arch.reserved_gpa_bits | rsvd_bits(5, 8) | rsvd_bits(1, 2); diff --git a/arch/x86/kvm/x86.h b/arch/x86/kvm/x86.h index bd4423e82b02..185062a26924 100644 --- a/arch/x86/kvm/x86.h +++ b/arch/x86/kvm/x86.h @@ -570,6 +570,18 @@ static inline bool kvm_pat_valid(u64 data) return (data | ((data & 0x0202020202020202ull) << 1)) == data; } +static inline bool __kvm_pv_async_pf_enabled(u64 data) +{ + u64 mask = KVM_ASYNC_PF_ENABLED | KVM_ASYNC_PF_DELIVERY_AS_INT; + + return (data & mask) == mask; +} + +static inline bool kvm_pv_async_pf_enabled(struct kvm_vcpu *vcpu) +{ + return __kvm_pv_async_pf_enabled(vcpu->arch.apf.msr_en_val); +} + /* * Trigger machine check on the host. We assume all the MSRs are already set up * by the CPU and that we still run on the same CPU as the MCE occurred on. -- 2.54.0.563.g4f69b47b94-goog