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[172.97.209.197]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-8c90c16366csm34974426d6.40.2026.05.14.15.58.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2026 15:58:13 -0700 (PDT) From: Raymond Mao To: opensbi@lists.infradead.org Cc: scott@riscstar.com, dave.patel@riscstar.com, raymond.mao@riscstar.com, robin.randhawa@sifive.com, samuel.holland@sifive.com, anup.patel@qti.qualcomm.com, anuppate@qti.qualcomm.com, anup@brainfault.org, dhaval@rivosinc.com, peter.lin@sifive.com Subject: [PATCH 01/10] lib: irqchip: add S-mode notification helpers Date: Thu, 14 May 2026 18:57:47 -0400 Message-Id: <20260514225756.2255758-2-raymondmaoca@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20260514225756.2255758-1-raymondmaoca@gmail.com> References: <20260514225756.2255758-1-raymondmaoca@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260514_155814_959671_6A599A3C X-CRM114-Status: GOOD ( 10.25 ) X-BeenThere: opensbi@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "opensbi" Errors-To: opensbi-bounces+opensbi=archiver.kernel.org@lists.infradead.org From: Raymond Mao Add irqchip helpers to set/clear S-mode notification (SEIP-based), In addition to set/clear, expose a get API to read the current notification state so upper layers can do edge-triggered notification. Signed-off-by: Raymond Mao --- include/sbi/sbi_irqchip.h | 24 ++++++++++++++++++++++++ lib/sbi/sbi_irqchip.c | 18 +++++++++++++++++- 2 files changed, 41 insertions(+), 1 deletion(-) diff --git a/include/sbi/sbi_irqchip.h b/include/sbi/sbi_irqchip.h index 77b54110..7f23615a 100644 --- a/include/sbi/sbi_irqchip.h +++ b/include/sbi/sbi_irqchip.h @@ -110,4 +110,28 @@ int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot); /** Exit interrupt controllers */ void sbi_irqchip_exit(struct sbi_scratch *scratch); +/** + * Notify S-mode for a pending virtual interrupt on this hart. + * + * The irqchip layer abstracts the notification mechanism; on platforms that + * use SEIP, this sets mip.SEIP. + */ +int sbi_irqchip_notify_smode_set(void); + +/** + * Clear S-mode notification for virtual interrupts on this hart. + * + * The irqchip layer abstracts the notification mechanism; on platforms that + * use SEIP, this clears mip.SEIP. + */ +void sbi_irqchip_notify_smode_clear(void); + +/** + * Read S-mode notification state for virtual interrupts on this hart. + * + * The irqchip layer abstracts the notification mechanism; on platforms that + * use SEIP, this reads mip.SEIP. + */ +bool sbi_irqchip_notify_smode_get(void); + #endif diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c index f8599fa6..e022d534 100644 --- a/lib/sbi/sbi_irqchip.c +++ b/lib/sbi/sbi_irqchip.c @@ -122,7 +122,7 @@ int sbi_irqchip_raw_handler_default(struct sbi_irqchip_device *chip, u32 hwirq) sbi_printf("[IRQCHIP] Calling hwirq %u raw handler callback\n", hwirq); rc = h->callback(hwirq, h->priv); - if (chip->hwirq_eoi) { + if (chip->hwirq_eoi && rc != SBI_EALREADY) { sbi_printf("[IRQCHIP] Calling EOI of hwirq %u\n", hwirq); chip->hwirq_eoi(chip, hwirq); } @@ -320,3 +320,19 @@ void sbi_irqchip_exit(struct sbi_scratch *scratch) if (hd && hd->chip && hd->chip->process_hwirqs) csr_clear(CSR_MIE, MIP_MEIP); } + +int sbi_irqchip_notify_smode_set(void) +{ + csr_set(CSR_MIP, MIP_SEIP); + return 0; +} + +void sbi_irqchip_notify_smode_clear(void) +{ + csr_clear(CSR_MIP, MIP_SEIP); +} + +bool sbi_irqchip_notify_smode_get(void) +{ + return !!(csr_read(CSR_MIP) & MIP_SEIP); +} -- 2.25.1 -- opensbi mailing list opensbi@lists.infradead.org http://lists.infradead.org/mailman/listinfo/opensbi