From: "David E. Box" <david.e.box@linux.intel.com>
To: "Rajneesh Bhardwaj" <irenic.rajneesh@gmail.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Hans de Goede" <hansg@kernel.org>
Cc: "David E. Box" <david.e.box@linux.intel.com>,
platform-driver-x86@vger.kernel.org,
linux-kernel@vger.kernel.org,
Xi Pardee <xi.pardee@linux.intel.com>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Subject: [PATCH v4 11/16] platform/x86/intel/pmc/ssram: Refactor DEVID/PWRMBASE extraction into helper
Date: Thu, 14 May 2026 17:21:18 -0700 [thread overview]
Message-ID: <20260515002130.701457-12-david.e.box@linux.intel.com> (raw)
In-Reply-To: <20260515002130.701457-1-david.e.box@linux.intel.com>
Move DEVID/PWRMBASE extraction into pmc_ssram_get_devid_pwrmbase().
This is a preparatory refactor to place functionality in a common helper
for reuse by a subsequent patch. Additionally add missing bits.h
include and define SSRAM_BASE_ADDR_MASK for the address extraction mask.
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
V4 - No changes
V3 - No changes
V2 changes:
- Added missing <linux/bits.h> include for GENMASK_ULL() used in get_base()
- Defined SSRAM_BASE_ADDR_MASK macro to replace magic mask constant
GENMASK_ULL(63, 3)
.../platform/x86/intel/pmc/ssram_telemetry.c | 33 ++++++++++++-------
1 file changed, 21 insertions(+), 12 deletions(-)
diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/platform/x86/intel/pmc/ssram_telemetry.c
index 4bfe60ee55ca..779e84c724ac 100644
--- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c
+++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c
@@ -5,6 +5,7 @@
* Copyright (c) 2023, Intel Corporation.
*/
+#include <linux/bits.h>
#include <linux/cleanup.h>
#include <linux/intel_vsec.h>
#include <linux/pci.h>
@@ -21,12 +22,30 @@
#define SSRAM_PCH_OFFSET 0x60
#define SSRAM_IOE_OFFSET 0x68
#define SSRAM_DEVID_OFFSET 0x70
+#define SSRAM_BASE_ADDR_MASK GENMASK_ULL(63, 3)
DEFINE_FREE(pmc_ssram_telemetry_iounmap, void __iomem *, if (_T) iounmap(_T))
static struct pmc_ssram_telemetry pmc_ssram_telems[MAX_NUM_PMC];
static bool device_probed;
+static inline u64 get_base(void __iomem *addr, u32 offset)
+{
+ return lo_hi_readq(addr + offset) & SSRAM_BASE_ADDR_MASK;
+}
+
+static void pmc_ssram_get_devid_pwrmbase(void __iomem *ssram, unsigned int pmc_idx)
+{
+ u64 pwrm_base;
+ u16 devid;
+
+ pwrm_base = get_base(ssram, SSRAM_PWRM_OFFSET);
+ devid = readw(ssram + SSRAM_DEVID_OFFSET);
+
+ pmc_ssram_telems[pmc_idx].devid = devid;
+ pmc_ssram_telems[pmc_idx].base_addr = pwrm_base;
+}
+
static int
pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64 ssram_base, void __iomem *ssram)
{
@@ -63,18 +82,12 @@ pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64 ssram_base, void __iomem
return intel_vsec_register(&pcidev->dev, &info);
}
-static inline u64 get_base(void __iomem *addr, u32 offset)
-{
- return lo_hi_readq(addr + offset) & GENMASK_ULL(63, 3);
-}
-
static int
pmc_ssram_telemetry_get_pmc(struct pci_dev *pcidev, unsigned int pmc_idx, u32 offset)
{
void __iomem __free(pmc_ssram_telemetry_iounmap) *tmp_ssram = NULL;
void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram = NULL;
- u64 ssram_base, pwrm_base;
- u16 devid;
+ u64 ssram_base;
ssram_base = pci_resource_start(pcidev, 0);
tmp_ssram = ioremap(ssram_base, SSRAM_HDR_SIZE);
@@ -99,11 +112,7 @@ pmc_ssram_telemetry_get_pmc(struct pci_dev *pcidev, unsigned int pmc_idx, u32 of
ssram = no_free_ptr(tmp_ssram);
}
- pwrm_base = get_base(ssram, SSRAM_PWRM_OFFSET);
- devid = readw(ssram + SSRAM_DEVID_OFFSET);
-
- pmc_ssram_telems[pmc_idx].devid = devid;
- pmc_ssram_telems[pmc_idx].base_addr = pwrm_base;
+ pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx);
/* Find and register and PMC telemetry entries */
return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram);
--
2.43.0
next prev parent reply other threads:[~2026-05-15 0:21 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-15 0:21 [PATCH v4 00/16] Add ACPI-based PMT discovery support for Intel PMC David E. Box
2026-05-15 0:21 ` [PATCH v4 01/16] platform/x86/intel/pmt: Add pre/post decode hooks around header parsing David E. Box
2026-05-15 0:21 ` [PATCH v4 02/16] platform/x86/intel/pmt/crashlog: Split init into pre-decode David E. Box
2026-05-15 0:21 ` [PATCH v4 03/16] platform/x86/intel/pmt/telemetry: Move overlap check to post-decode hook David E. Box
2026-05-15 0:21 ` [PATCH v4 04/16] platform/x86/intel/pmt: Pass discovery index instead of resource David E. Box
2026-05-15 0:21 ` [PATCH v4 05/16] platform/x86/intel/pmt: Cache the telemetry discovery header David E. Box
2026-05-15 0:21 ` [PATCH v4 06/16] platform/x86/intel/pmt: Unify header fetch and add ACPI source David E. Box
2026-05-15 0:21 ` [PATCH v4 07/16] platform/x86/intel/pmc: Add PMC SSRAM Kconfig description David E. Box
2026-05-15 0:21 ` [PATCH v4 08/16] platform/x86/intel/pmc: Add ACPI PWRM telemetry driver for Nova Lake S David E. Box
2026-05-15 0:21 ` [PATCH v4 09/16] platform/x86/intel/pmc/ssram: Rename probe and PCI ID table for consistency David E. Box
2026-05-15 0:21 ` [PATCH v4 10/16] platform/x86/intel/pmc/ssram: Use fixed-size static pmc array David E. Box
2026-05-15 0:21 ` David E. Box [this message]
2026-05-15 0:21 ` [PATCH v4 12/16] platform/x86/intel/pmc/ssram: Add PCI platform data David E. Box
2026-05-15 0:21 ` [PATCH v4 13/16] platform/x86/intel/pmc/ssram: Refactor memory barrier for reentrant probe David E. Box
2026-05-15 0:21 ` [PATCH v4 14/16] platform/x86/intel/pmc/ssram: Add ACPI discovery scaffolding David E. Box
2026-05-15 0:21 ` [PATCH v4 15/16] platform/x86/intel/pmc/ssram: Make PMT registration optional David E. Box
2026-05-15 0:21 ` [PATCH v4 16/16] platform/x86/intel/pmc: Add NVL PCI IDs for SSRAM telemetry discovery David E. Box
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260515002130.701457-12-david.e.box@linux.intel.com \
--to=david.e.box@linux.intel.com \
--cc=hansg@kernel.org \
--cc=ilpo.jarvinen@linux.intel.com \
--cc=irenic.rajneesh@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=platform-driver-x86@vger.kernel.org \
--cc=srinivas.pandruvada@linux.intel.com \
--cc=xi.pardee@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.