From: Ping-Ke Shih <pkshih@realtek.com>
To: <linux-wireless@vger.kernel.org>
Cc: <timlee@realtek.com>, <dian_syuan0116@realtek.com>,
<phhuang@realtek.com>, <kevin_yang@realtek.com>
Subject: [PATCH rtw-next 13/13] wifi: rtw89: 8922d: add quota for RTL8922DE variant
Date: Fri, 15 May 2026 09:44:33 +0800 [thread overview]
Message-ID: <20260515014433.16168-14-pkshih@realtek.com> (raw)
In-Reply-To: <20260515014433.16168-1-pkshih@realtek.com>
The existing quota set is for RTL8922DE-VS, so rename the existing tables.
Add new quota set for RTL8922DE, containing more memory to yield better
performance, so rearrange quota accordingly.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/mac.c | 8 ++
drivers/net/wireless/realtek/rtw89/mac.h | 8 ++
drivers/net/wireless/realtek/rtw89/rtw8922d.c | 73 +++++++++++++++++--
3 files changed, 83 insertions(+), 6 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/mac.c b/drivers/net/wireless/realtek/rtw89/mac.c
index bd606d1da634..8c395517bd2f 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.c
+++ b/drivers/net/wireless/realtek/rtw89/mac.c
@@ -1748,6 +1748,7 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
.wde_size18_v1 = {RTW89_WDE_PG_64, 0, 640, 0,},
/* 8852C PCIE SCC */
.wde_size19 = {RTW89_WDE_PG_64, 3328, 0,},
+ .wde_size22_v1 = {RTW89_WDE_PG_128, 384, 0, 0,},
.wde_size23 = {RTW89_WDE_PG_64, 1022, 2,},
/* 8852B USB2.0/USB3.0 SCC turbo */
.wde_size30 = {RTW89_WDE_PG_64, 220, 36,},
@@ -1781,6 +1782,7 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
.ple_size22_v1 = {RTW89_PLE_PG_128, 2736, 0, 40960,},
/* 8851B USB2.0 SCC turbo */
.ple_size27 = {RTW89_PLE_PG_128, 1396, 12,},
+ .ple_size29_v1 = {RTW89_PLE_PG_128, 1895, 182, 49152,},
/* 8852B USB3.0 SCC turbo */
.ple_size31 = {RTW89_PLE_PG_128, 1392, 16,},
/* 8852C USB2.0 */
@@ -1811,6 +1813,7 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
.wde_qt18 = {3228, 60, 0, 40,},
.wde_qt19_v1 = {613, 6, 0, 20,},
.wde_qt23 = {958, 48, 0, 16,},
+ .wde_qt23_v1 = {371, 3, 0, 10,},
/* 8852B USB2.0/USB3.0 SCC turbo */
.wde_qt30 = {210, 2, 0, 8,},
/* 8852C USB2.0 */
@@ -1868,6 +1871,8 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
/* 8851B USB2.0 SCC turbo */
.ple_qt61 = {858, 0, 16, 48, 4, 13, 370, 0, 32, 14, 8, 0, 0,},
.ple_qt62 = {858, 0, 32, 48, 37, 13, 403, 0, 65, 14, 24, 0, 0,},
+ .ple_qt64_v2 = {91, 91, 32, 16, 19, 13, 93, 93, 44, 34, 1, 4, 0, 0,},
+ .ple_qt65_v2 = {645, 645, 32, 1380, 1383, 1377, 1457, 1457, 1408, 1398, 1, 1368,},
/* USB2.0 52C */
.ple_qt78 = {1560, 0, 16, 48, 13, 13, 390, 0, 32, 38, 8, 16, 0,},
/* USB2.0 52C */
@@ -1888,10 +1893,13 @@ const struct rtw89_mac_size_set rtw89_mac_size = {
.rsvd0_size3 = {57344, 0,},
.rsvd0_size5 = {32768, 0,},
.rsvd0_size6 = {40960, 0,},
+ .rsvd0_size17 = {49152, 0,},
.rsvd1_size0 = {587776, 2048,},
.rsvd1_size2 = {391168, 2048,},
+ .rsvd1_size3 = {315008, 78208,},
.dle_input3 = {0, 0, 0, 16384, 0, 2048, 0, 0, 0,},
.dle_input20 = {128, 128, 11454, 2048, 0, 2048, 1024, 24, 24,},
+ .dle_input28 = {128, 128, 11454, 2048, 0, 2048, 2048, 24, 24,},
};
EXPORT_SYMBOL(rtw89_mac_size);
diff --git a/drivers/net/wireless/realtek/rtw89/mac.h b/drivers/net/wireless/realtek/rtw89/mac.h
index 3d57f0acfba1..539061fc15e8 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.h
+++ b/drivers/net/wireless/realtek/rtw89/mac.h
@@ -946,6 +946,7 @@ struct rtw89_mac_size_set {
const struct rtw89_dle_size wde_size18;
const struct rtw89_dle_size wde_size18_v1;
const struct rtw89_dle_size wde_size19;
+ const struct rtw89_dle_size wde_size22_v1;
const struct rtw89_dle_size wde_size23;
const struct rtw89_dle_size wde_size30;
const struct rtw89_dle_size wde_size31;
@@ -966,6 +967,7 @@ struct rtw89_mac_size_set {
const struct rtw89_dle_size ple_size20_v1;
const struct rtw89_dle_size ple_size22_v1;
const struct rtw89_dle_size ple_size27;
+ const struct rtw89_dle_size ple_size29_v1;
const struct rtw89_dle_size ple_size31;
const struct rtw89_dle_size ple_size34;
const struct rtw89_wde_quota wde_qt0;
@@ -984,6 +986,7 @@ struct rtw89_mac_size_set {
const struct rtw89_wde_quota wde_qt18;
const struct rtw89_wde_quota wde_qt19_v1;
const struct rtw89_wde_quota wde_qt23;
+ const struct rtw89_wde_quota wde_qt23_v1;
const struct rtw89_wde_quota wde_qt30;
const struct rtw89_wde_quota wde_qt31;
const struct rtw89_ple_quota ple_qt0;
@@ -1020,6 +1023,8 @@ struct rtw89_mac_size_set {
const struct rtw89_ple_quota ple_qt59;
const struct rtw89_ple_quota ple_qt61;
const struct rtw89_ple_quota ple_qt62;
+ const struct rtw89_ple_quota ple_qt64_v2;
+ const struct rtw89_ple_quota ple_qt65_v2;
const struct rtw89_ple_quota ple_qt78;
const struct rtw89_ple_quota ple_qt79;
const struct rtw89_ple_quota ple_qt_52a_wow;
@@ -1035,10 +1040,13 @@ struct rtw89_mac_size_set {
const struct rtw89_dle_rsvd_size rsvd0_size3;
const struct rtw89_dle_rsvd_size rsvd0_size5;
const struct rtw89_dle_rsvd_size rsvd0_size6;
+ const struct rtw89_dle_rsvd_size rsvd0_size17;
const struct rtw89_dle_rsvd_size rsvd1_size0;
const struct rtw89_dle_rsvd_size rsvd1_size2;
+ const struct rtw89_dle_rsvd_size rsvd1_size3;
const struct rtw89_dle_input dle_input3;
const struct rtw89_dle_input dle_input20;
+ const struct rtw89_dle_input dle_input28;
};
extern const struct rtw89_mac_size_set rtw89_mac_size;
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d.c b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
index 2f0c3a5d937c..a453b220d7ae 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
@@ -25,6 +25,62 @@
RTW89_GEN_MODULE_FWNAME(RTW8922DS_FW_BASENAME, RTW8922DS_FW_FORMAT_MAX)
static const struct rtw89_hfc_ch_cfg rtw8922d_hfc_chcfg_pcie[] = {
+ {2, 732, 0}, /* ACH 0 */
+ {0, 730, 0}, /* ACH 1 */
+ {2, 732, 0}, /* ACH 2 */
+ {0, 730, 0}, /* ACH 3 */
+ {2, 732, 0}, /* ACH 4 */
+ {0, 730, 0}, /* ACH 5 */
+ {2, 732, 0}, /* ACH 6 */
+ {0, 730, 0}, /* ACH 7 */
+ {2, 732, 0}, /* B0MGQ */
+ {0, 730, 0}, /* B0HIQ */
+ {2, 732, 0}, /* B1MGQ */
+ {0, 730, 0}, /* B1HIQ */
+ {0, 0, 0}, /* GCQ */
+};
+
+static const struct rtw89_hfc_pub_cfg rtw8922d_hfc_pubcfg_pcie = {
+ 742, /* Group 0 */
+ 0, /* Group 1 */
+ 742, /* Public Max */
+ 0, /* WP threshold */
+};
+
+static const struct rtw89_hfc_param_ini rtw8922d_hfc_param_ini_pcie[] = {
+ [RTW89_QTA_SCC] = {rtw8922d_hfc_chcfg_pcie, &rtw8922d_hfc_pubcfg_pcie,
+ &rtw89_mac_size.hfc_prec_cfg_c0, RTW89_HCIFC_POH},
+ [RTW89_QTA_DBCC] = {rtw8922d_hfc_chcfg_pcie, &rtw8922d_hfc_pubcfg_pcie,
+ &rtw89_mac_size.hfc_prec_cfg_c0, RTW89_HCIFC_POH},
+ [RTW89_QTA_DLFW] = {NULL, NULL, &rtw89_mac_size.hfc_prec_cfg_c2,
+ RTW89_HCIFC_POH},
+ [RTW89_QTA_INVALID] = {NULL},
+};
+
+static const struct rtw89_dle_mem rtw8922d_dle_mem_pcie[] = {
+ [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size22_v1,
+ &rtw89_mac_size.ple_size29_v1, &rtw89_mac_size.wde_qt23_v1,
+ &rtw89_mac_size.wde_qt23_v1, &rtw89_mac_size.ple_qt64_v2,
+ &rtw89_mac_size.ple_qt65_v2, &rtw89_mac_size.ple_rsvd_qt9,
+ &rtw89_mac_size.rsvd0_size17, &rtw89_mac_size.rsvd1_size3,
+ &rtw89_mac_size.dle_input28},
+ [RTW89_QTA_DBCC] = {RTW89_QTA_DBCC, &rtw89_mac_size.wde_size22_v1,
+ &rtw89_mac_size.ple_size29_v1, &rtw89_mac_size.wde_qt23_v1,
+ &rtw89_mac_size.wde_qt23_v1, &rtw89_mac_size.ple_qt64_v2,
+ &rtw89_mac_size.ple_qt65_v2, &rtw89_mac_size.ple_rsvd_qt9,
+ &rtw89_mac_size.rsvd0_size17, &rtw89_mac_size.rsvd1_size3,
+ &rtw89_mac_size.dle_input28},
+ [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size18_v1,
+ &rtw89_mac_size.ple_size22_v1, &rtw89_mac_size.wde_qt3,
+ &rtw89_mac_size.wde_qt3, &rtw89_mac_size.ple_qt5_v2,
+ &rtw89_mac_size.ple_qt47_v2, &rtw89_mac_size.ple_rsvd_qt1,
+ &rtw89_mac_size.rsvd0_size6, &rtw89_mac_size.rsvd1_size2,
+ &rtw89_mac_size.dle_input3},
+ [RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL,
+ NULL},
+};
+
+static const struct rtw89_hfc_ch_cfg rtw8922ds_hfc_chcfg_pcie[] = {
{2, 603, 0}, /* ACH 0 */
{0, 601, 0}, /* ACH 1 */
{2, 603, 0}, /* ACH 2 */
@@ -40,24 +96,24 @@ static const struct rtw89_hfc_ch_cfg rtw8922d_hfc_chcfg_pcie[] = {
{0, 0, 0}, /* GCQ */
};
-static const struct rtw89_hfc_pub_cfg rtw8922d_hfc_pubcfg_pcie = {
+static const struct rtw89_hfc_pub_cfg rtw8922ds_hfc_pubcfg_pcie = {
613, /* Group 0 */
0, /* Group 1 */
613, /* Public Max */
0, /* WP threshold */
};
-static const struct rtw89_hfc_param_ini rtw8922d_hfc_param_ini_pcie[] = {
- [RTW89_QTA_SCC] = {rtw8922d_hfc_chcfg_pcie, &rtw8922d_hfc_pubcfg_pcie,
+static const struct rtw89_hfc_param_ini rtw8922ds_hfc_param_ini_pcie[] = {
+ [RTW89_QTA_SCC] = {rtw8922ds_hfc_chcfg_pcie, &rtw8922ds_hfc_pubcfg_pcie,
&rtw89_mac_size.hfc_prec_cfg_c0, RTW89_HCIFC_POH},
- [RTW89_QTA_DBCC] = {rtw8922d_hfc_chcfg_pcie, &rtw8922d_hfc_pubcfg_pcie,
+ [RTW89_QTA_DBCC] = {rtw8922ds_hfc_chcfg_pcie, &rtw8922ds_hfc_pubcfg_pcie,
&rtw89_mac_size.hfc_prec_cfg_c0, RTW89_HCIFC_POH},
[RTW89_QTA_DLFW] = {NULL, NULL, &rtw89_mac_size.hfc_prec_cfg_c2,
RTW89_HCIFC_POH},
[RTW89_QTA_INVALID] = {NULL},
};
-static const struct rtw89_dle_mem rtw8922d_dle_mem_pcie[] = {
+static const struct rtw89_dle_mem rtw8922ds_dle_mem_pcie[] = {
[RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size16_v1,
&rtw89_mac_size.ple_size20_v1, &rtw89_mac_size.wde_qt19_v1,
&rtw89_mac_size.wde_qt19_v1, &rtw89_mac_size.ple_qt44_v2,
@@ -3148,11 +3204,16 @@ static const struct rtw89_fw_def rtw8922de_vs_fw_def = {
.fw_b_aid = RTL8922D_AID7060,
};
+static const struct rtw89_qta_def rtw8922ds_qta_def = {
+ .hfc_param_ini = {rtw8922ds_hfc_param_ini_pcie, NULL, NULL},
+ .dle_mem = {rtw8922ds_dle_mem_pcie, NULL, NULL, NULL},
+};
+
const struct rtw89_chip_variant rtw8922de_vs_variant = {
.no_mcs_12_13 = true,
.fw_min_ver_code = RTW89_FW_VER_CODE(0, 0, 0, 0),
.fw_def_override = &rtw8922de_vs_fw_def,
- .qta_def_override = NULL,
+ .qta_def_override = &rtw8922ds_qta_def,
};
EXPORT_SYMBOL(rtw8922de_vs_variant);
--
2.25.1
prev parent reply other threads:[~2026-05-15 1:45 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-15 1:44 [PATCH rtw-next 00/13] wifi: rtw89: update SER, PCI, WoW and quota settings Ping-Ke Shih
2026-05-15 1:44 ` [PATCH rtw-next 01/13] wifi: rtw89: debug: Wi-Fi 7 show count of SER L0 simulation Ping-Ke Shih
2026-05-15 1:44 ` [PATCH rtw-next 02/13] wifi: rtw89: debug: Wi-Fi 7 update simulation of SER L0/L1 by halt H2C command Ping-Ke Shih
2026-05-15 1:44 ` [PATCH rtw-next 03/13] wifi: rtw89: fw: dump status of H2C command and C2H event for SER Ping-Ke Shih
2026-05-15 1:44 ` [PATCH rtw-next 04/13] wifi: rtw89: pci: enable LTR based on pcie control register Ping-Ke Shih
2026-05-15 1:44 ` [PATCH rtw-next 05/13] wifi: rtw89: pci: not disable PCI completion timeout control for a variant of RTL8922DE Ping-Ke Shih
2026-05-15 1:44 ` [PATCH rtw-next 06/13] wifi: rtw89: pci: disable PCI PHY error flag 8 Ping-Ke Shih
2026-05-15 1:44 ` [PATCH rtw-next 07/13] wifi: rtw89: clear auto K delay value before downloading firmware Ping-Ke Shih
2026-05-15 1:44 ` [PATCH rtw-next 08/13] wifi: rtw89: wow: send ARP reply packets instead of Null packets to keep alive Ping-Ke Shih
2026-05-15 1:44 ` [PATCH rtw-next 09/13] wifi: rtw89: correct drop logic for malformed AMPDU frames Ping-Ke Shih
2026-05-15 1:44 ` [PATCH rtw-next 10/13] wifi: rtw89: 8922d: change naming number and update values for WDE/PLE quota Ping-Ke Shih
2026-05-15 1:44 ` [PATCH rtw-next 11/13] wifi: rtw89: mac: add field of release report size to DLE quota Ping-Ke Shih
2026-05-15 1:44 ` [PATCH rtw-next 12/13] wifi: rtw89: mac: consolidate quota into a struct for variant chips Ping-Ke Shih
2026-05-15 1:44 ` Ping-Ke Shih [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260515014433.16168-14-pkshih@realtek.com \
--to=pkshih@realtek.com \
--cc=dian_syuan0116@realtek.com \
--cc=kevin_yang@realtek.com \
--cc=linux-wireless@vger.kernel.org \
--cc=phhuang@realtek.com \
--cc=timlee@realtek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.