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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	qemu-arm@nongnu.org, "Joel Stanley" <joel@jms.id.au>,
	"Kane Chen" <kane_chen@aspeedtech.com>,
	"Troy Lee" <leetroy@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Pierrick Bouvier" <pierrick.bouvier@oss.qualcomm.com>,
	"Jamin Lin" <jamin_lin@aspeedtech.com>,
	"Steven Lee" <steven_lee@aspeedtech.com>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Manos Pitsidianakis" <manos.pitsidianakis@linaro.org>
Subject: [PATCH v6 02/20] hw/arm/raspi: Initialize 64-bit CPU types during DeviceRealize()
Date: Fri, 15 May 2026 16:10:13 +0200	[thread overview]
Message-ID: <20260515141032.3271-3-philmd@linaro.org> (raw)
In-Reply-To: <20260515141032.3271-1-philmd@linaro.org>

bcm2836.c models 3 similar SoC: BCM2835, BCM2836 and BCM2837.
The BCM2837 is a 64-bit only SoC (Cortex-A53), only available
in the 64-bit binary.

If we build this file as common object, all BCM SoCs become
available in both 32 and 64-bit binaries; however when running
the introspection test on the 32-bit binary, the BCM2837 init()
method tries to init the Cortex-A53 type -- although not
realizing it -- which is not available. This can be avoided by
deferring the CPU type initialization to the SoC DeviceRealize
step (this is safe because nothing uses the CPU type before,
only the GIC access them, just after their realization).

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 hw/arm/bcm2836.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index ee2f44debd1..03825e69d06 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -25,12 +25,7 @@ static void bcm283x_base_init(Object *obj)
 {
     BCM283XBaseState *s = BCM283X_BASE(obj);
     BCM283XBaseClass *bc = BCM283X_BASE_GET_CLASS(obj);
-    int n;
 
-    for (n = 0; n < bc->core_count; n++) {
-        object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
-                                bc->cpu_type);
-    }
     if (bc->core_count > 1) {
         qdev_property_add_static(DEVICE(obj), &bcm2836_enabled_cores_property);
         qdev_prop_set_uint32(DEVICE(obj), "enabled-cpus", bc->core_count);
@@ -65,6 +60,11 @@ bool bcm283x_common_realize(DeviceState *dev, BCMSocPeripheralBaseState *ps,
     BCM283XBaseClass *bc = BCM283X_BASE_GET_CLASS(dev);
     Object *obj;
 
+    for (int n = 0; n < bc->core_count; n++) {
+        object_initialize_child(OBJECT(dev), "cpu[*]", &s->cpu[n].core,
+                                bc->cpu_type);
+    }
+
     /* common peripherals from bcm2835 */
 
     obj = object_property_get_link(OBJECT(dev), "ram", &error_abort);
-- 
2.53.0



  parent reply	other threads:[~2026-05-15 14:11 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-15 14:10 [PATCH v6 00/20] single-binary: Make hw/arm/ common Philippe Mathieu-Daudé
2026-05-15 14:10 ` [PATCH v6 01/20] hw/arm: Build ARM/HVF GICv3 stub once Philippe Mathieu-Daudé
2026-05-15 16:35   ` Pierrick Bouvier
2026-05-15 14:10 ` Philippe Mathieu-Daudé [this message]
2026-05-15 14:15   ` [PATCH v6 02/20] hw/arm/raspi: Initialize 64-bit CPU types during DeviceRealize() Manos Pitsidianakis
2026-05-15 16:58   ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 03/20] hw/arm/raspi: Build objects once Philippe Mathieu-Daudé
2026-05-15 14:15   ` Manos Pitsidianakis
2026-05-15 14:10 ` [PATCH v6 04/20] hw/arm/aspeed: Initialize 64-bit CPU types during DeviceRealize() Philippe Mathieu-Daudé
2026-05-15 14:14   ` Manos Pitsidianakis
2026-05-15 16:29   ` Cédric Le Goater
2026-05-15 17:00     ` Pierrick Bouvier
2026-05-15 17:18       ` Cédric Le Goater
2026-05-15 17:22         ` Pierrick Bouvier
2026-05-15 21:17           ` Cédric Le Goater
2026-05-15 17:00   ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 05/20] hw/arm/aspeed: Build objects once Philippe Mathieu-Daudé
2026-05-15 14:16   ` Manos Pitsidianakis
2026-05-15 14:10 ` [PATCH v6 06/20] hw/arm/meson: Remove now unused arm_ss[] source set Philippe Mathieu-Daudé
2026-05-15 14:16   ` Manos Pitsidianakis
2026-05-15 14:10 ` [PATCH v6 07/20] target/arm: Introduce common system/user meson " Philippe Mathieu-Daudé
2026-05-15 14:17   ` Manos Pitsidianakis
2026-05-15 17:04   ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 08/20] target/arm: Build gdbstub64.o as common object Philippe Mathieu-Daudé
2026-05-15 14:17   ` Manos Pitsidianakis
2026-05-15 17:04   ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 09/20] target/arm: Build cpu64.o " Philippe Mathieu-Daudé
2026-05-15 14:21   ` Manos Pitsidianakis
2026-05-15 14:27     ` Philippe Mathieu-Daudé
2026-05-15 17:06   ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 10/20] target/arm: Restrict IDAU interface to TCG namespace Philippe Mathieu-Daudé
2026-05-15 14:23   ` Manos Pitsidianakis
2026-05-15 14:27     ` Philippe Mathieu-Daudé
2026-05-15 17:07   ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 11/20] target/arm: Rename Aarch64-specific methods Philippe Mathieu-Daudé
2026-05-15 14:23   ` Manos Pitsidianakis
2026-05-15 14:10 ` [PATCH v6 12/20] target/arm: Extract common code related to 'max' CPU Philippe Mathieu-Daudé
2026-05-15 14:24   ` Manos Pitsidianakis
2026-05-15 17:10   ` Pierrick Bouvier
2026-05-15 17:13     ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 13/20] target/arm: Use make_ccsidr(LEGACY) in 32 bit 'max' CPU type Philippe Mathieu-Daudé
2026-05-15 14:25   ` Manos Pitsidianakis
2026-05-15 17:10   ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 14/20] target/arm: Implement DBGDEVID* registers in max AArch32 CPU Philippe Mathieu-Daudé
2026-05-15 14:26   ` Manos Pitsidianakis
2026-05-15 17:11   ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 15/20] target/arm: Only set %kvm_target when KVM is enabled Philippe Mathieu-Daudé
2026-05-15 14:26   ` Manos Pitsidianakis
2026-05-15 17:11   ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 16/20] target/arm: Factor aarch64_aa32_a57_init() out Philippe Mathieu-Daudé
2026-05-15 14:27   ` Manos Pitsidianakis
2026-05-15 17:12   ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 17/20] target/arm: Re-use common aarch64_aa32_a57_init() helper Philippe Mathieu-Daudé
2026-05-15 14:28   ` Manos Pitsidianakis
2026-05-15 17:12   ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 18/20] target/arm: Define 'max' CPU type in cpu-max.c Philippe Mathieu-Daudé
2026-05-15 14:29   ` Manos Pitsidianakis
2026-05-15 17:22   ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 19/20] target/arm: Build cpu32-system.o as common object Philippe Mathieu-Daudé
2026-05-15 14:30   ` Manos Pitsidianakis
2026-05-15 17:14   ` Pierrick Bouvier
2026-05-15 14:10 ` [PATCH v6 20/20] target/arm: Build cpu-max.c once Philippe Mathieu-Daudé
2026-05-15 14:31   ` Manos Pitsidianakis
2026-05-15 17:15   ` Pierrick Bouvier
2026-05-15 17:02 ` [PATCH v6 00/20] single-binary: Make hw/arm/ common Pierrick Bouvier

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