Re: [PATCH v6 15/28] media: rockchip: rga: align stride to 4 bytes

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Buffer offset mismatch and hardware stride truncation for planar YUV formats with hdiv=2.
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commit bb91296b78fd1bbee406e680e751a44387d9a72a
Author: Sven Püschel <s.pueschel@pengutronix.de>

media: rockchip: rga: align stride to 4 bytes

This commit adds a stride_alignment setting to rga_hw and updates the
driver to use v4l2_fill_pixfmt_mp_aligned(). This ensures the stride is
aligned to 4 bytes, avoiding off-by-one errors when the driver divides
the stride by 4 to program the word-based RGA registers.

> diff --git a/drivers/media/platform/rockchip/rga/rga-hw.c b/drivers/media/platform/rockchip/rga/rga-hw.c
> index 9881c14f908d5..dac3cb6aa17d3 100644
> --- a/drivers/media/platform/rockchip/rga/rga-hw.c
> +++ b/drivers/media/platform/rockchip/rga/rga-hw.c
> @@ -580,6 +580,7 @@ const struct rga_hw rga2_hw = {
>  	.max_width = MAX_WIDTH,
>  	.min_height = MIN_HEIGHT,
>  	.max_height = MAX_HEIGHT,
> +	.stride_alignment = 4,

Could this cause buffer offset mismatches and hardware stride truncation
for planar YUV formats with horizontal subsampling?

For planar formats where hdiv=2, such as V4L2_PIX_FMT_YUV420, a width of
642 results in a Y stride of 644 when aligned to 4. The U/V stride is
typically half of the Y stride, which would equal 322 bytes.

If the hardware relies on word units (4 bytes), 322 is not divisible by 4.
It might be truncated to 80 words (320 bytes), causing a 2-byte drift per
line for the chrominance channels.

Additionally, v4l2_fill_pixfmt_mp_aligned() calculates sizeimage for
single-planar formats by aligning each plane's stride to the specified
alignment. For a 322-byte U stride, it aligns up to 324 bytes, introducing
padding. If the driver derives the V plane offset natively using the
unaligned bytesperline / 2, the hardware will read from a smaller,
unpadded offset than where the V4L2 user-space placed it.

Does the Y stride alignment need to be 8 bytes when hdiv=2 to ensure the
derived U/V strides are multiples of 4?

[ ... ]

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Sashiko AI review · https://sashiko.dev/#/patchset/20260515-spu-rga3-v6-0-e547152eb9c9@pengutronix.de?part=15