Re: [PATCH] arm64: dts: allwinner: Cubie A5E: enable SPI flash

[Andre Przywara <andre.przywara@arm.com>]

On Sat, 16 May 2026 00:12:17 +0800
Chen-Yu Tsai <wens@kernel.org> wrote:

> On Wed, May 13, 2026 at 5:19 PM Andre Przywara <andre.przywara@arm.com> wrote:
> >
> > Hi Chen-Yu,
> >
> > thanks for chipping in!
> >
> > On 5/13/26 07:21, Chen-Yu Tsai wrote:  
> > > Hi,
> > >
> > > On Tue, May 12, 2026 at 6:18 AM Andre Przywara <andre.przywara@arm.com> wrote:  
> > >>
> > >> The Cubie A5E board comes with 16MiB of SPI NOR flash.
> > >>
> > >> Enable the SPI0 DT node and describe the configuration.
> > >>
> > >> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > >> ---
> > >>   .../boot/dts/allwinner/sun55i-a527-cubie-a5e.dts  | 15 +++++++++++++++
> > >>   1 file changed, 15 insertions(+)
> > >>
> > >> diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
> > >> index bfdf1728cd14b..7ad22fc85d1fd 100644
> > >> --- a/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
> > >> +++ b/arch/arm64/boot/dts/allwinner/sun55i-a527-cubie-a5e.dts
> > >> @@ -344,6 +344,21 @@ &r_pio {
> > >>          vcc-pm-supply = <&reg_aldo3>;
> > >>   };
> > >>
> > >> +&spi0  {
> > >> +       pinctrl-names = "default";
> > >> +       pinctrl-0 = <&spi0_pc_pins>, <&spi0_cs0_pc_pin>,
> > >> +                   <&spi0_hold_pc_pin>, <&spi0_wp_pc_pin>;  
> > >
> > > This whole thing needs to be an overlay. The HOLD and WP pins
> > > conflict with eMMC usage, so it seems that Radxa only populates
> > > one or the other.
> > >
> > > If you look at the pictures on their official website, you'll see the
> > > SPI NOR chip populated, but not the eMMC chip. On the linux-sunxi wiki
> > > page, you'll see the opposite.  
> >
> > Well, I have a hard time spotting any actual eMMC SKUs in the shops anyway.
> > But you are right, the hold and WP pins conflict with eMMC, whereas the
> > other pins are not.
> >  
> > > And you probably want to enable QSPI, like Sashiko mentioned.  
> >
> > Well, in the interest of keeping this simple and enabling the usage of
> > SPI flash for all the users out there, I'd rather drop the extra pins.
> > This is mostly really useful for booting the firmware, maybe loading a
> > tiny kernel or other data once, so performance is not a big concern in
> > this use case. The BootROM surely does not use QSPI.  
> 
> Given that the pins are tied on physically, if someone then enables mmc2
> for a potentially present eMMC, the two pins could be toggled by the
> MMC controller, causing the flash to misbehave. I'm slightly concerned
> about this possibility.

That's a good point, but that means it's really a hardware design
issue: you cannot have SPI together with eMMC on this board.

I don't know if Radxa ships the eMMC SKUs without SPI flash, I
will try to query Tom Cubie about this.

I would prefer to go with SPI flash, at least for now: I think that's
what most users have, and the eMMC versions are rare so far? Since we
don't have an eMMC node in the DT anyway, that should be fine for now.
If someone adds eMMC support later, we would need to figure this out.
We could mark one as disabled, and leave it up to users (or U-Boot)
to decide which to enable.
On the H6 there is a similar problem: PC5 is both SPI0_CS and MMC2_CMD,
so on the PineH64 we disable the SPI flash, in favour of eMMC, which is
more useful for users (but sunxi-fel SPI access and U-Boot SPI loading
work nevertheless). But given the apparent prevalence of SPI boards vs.
those with eMMC for the Cubie A5E, I would go with SPI on this one.

Does that make sense? Any thoughts?

Cheers,
Andre

> > And as you say, if people are really interested in the last bit of
> > performance, they can use an overlay.
> >
> > Cheers,
> > Andre
> >  
> > >
> > >
> > > ChenYu
> > >
> > >  
> > >> +       status = "okay";
> > >> +
> > >> +       flash@0 {
> > >> +               compatible = "winbond,w25q128", "jedec,spi-nor";
> > >> +               reg = <0>;
> > >> +               spi-max-frequency = <40000000>;
> > >> +               #address-cells = <1>;
> > >> +               #size-cells = <1>;
> > >> +       };
> > >> +};
> > >> +
> > >>   &uart0 {
> > >>          pinctrl-names = "default";
> > >>          pinctrl-0 = <&uart0_pb_pins>;
> > >> --
> > >> 2.46.4
> > >>  
> > >  
> >  
>