From: Christoph Hellwig <hch@lst.de>
To: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com>
Cc: Christoph Hellwig <hch@lst.de>, Leon Romanovsky <leon@kernel.org>,
m.szyprowski@samsung.com, robin.murphy@arm.com, djbw@kernel.org,
akpm@linux-foundation.org, catalin.marinas@arm.com,
harry@kernel.org, ming.lei@redhat.com, iommu@lists.linux.dev,
linux-kernel@vger.kernel.org, Keith Busch <kbusch@kernel.org>
Subject: Re: [PATCH] dma-debug: skip cacheline overlap tracking on cache-coherent architectures
Date: Tue, 19 May 2026 11:28:19 +0200 [thread overview]
Message-ID: <20260519092819.GA20292@lst.de> (raw)
In-Reply-To: <CABXGCsNg6NUefejbqGBpH1iff9H6mJ-3Zamb0A54ay1zrfuJeQ@mail.gmail.com>
On Tue, May 19, 2026 at 01:03:08PM +0500, Mikhail Gavrilov wrote:
> On Tue, May 19, 2026 at 12:18 PM Christoph Hellwig <hch@lst.de> wrote:
> >
> > It is not. We could require direct I/O to/from devices that are
> > attached without DMA coherence to require cache line alignment.
> >
> > Now that Keith pushed down the checking into the driver that's even
> > fairly easily doable.
> >
>
> Good to hear. Is there a posted series or branch I could look at?
This work is upstream, IIRC it got merged around 6.18 or 6.19.
next prev parent reply other threads:[~2026-05-19 9:28 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-18 11:32 [PATCH] dma-debug: skip cacheline overlap tracking on cache-coherent architectures Mikhail Gavrilov
2026-05-18 12:10 ` Leon Romanovsky
2026-05-18 12:23 ` Mikhail Gavrilov
2026-05-18 12:53 ` Leon Romanovsky
2026-05-18 13:29 ` Mikhail Gavrilov
2026-05-19 7:17 ` Christoph Hellwig
2026-05-19 8:03 ` Mikhail Gavrilov
2026-05-19 9:28 ` Christoph Hellwig [this message]
2026-05-19 9:57 ` Mikhail Gavrilov
2026-05-19 11:49 ` Christoph Hellwig
2026-05-19 9:06 ` David Laight
2026-05-19 9:18 ` Mikhail Gavrilov
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