From: Jamin Lin <jamin_lin@aspeedtech.com>
To: "Cédric Le Goater" <clg@kaod.org>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Joel Stanley" <joel@jms.id.au>,
"open list:ASPEED BMCs" <qemu-arm@nongnu.org>,
"open list:All patches CC here" <qemu-devel@nongnu.org>
Cc: Jamin Lin <jamin_lin@aspeedtech.com>, Troy Lee <troy_lee@aspeedtech.com>
Subject: [PATCH v1 2/4] hw/arm/aspeed: Introduce SDRAM memory region support
Date: Thu, 21 May 2026 06:52:06 +0000 [thread overview]
Message-ID: <20260521065203.3713466-3-jamin_lin@aspeedtech.com> (raw)
In-Reply-To: <20260521065203.3713466-1-jamin_lin@aspeedtech.com>
AST1040 platforms require dedicated SDRAM handling in addition to
the existing SRAM support. Add an SDRAM MemoryRegion to
AspeedSoCState and introduce an sdram_size field in
AspeedSoCClass for SoC-specific SDRAM configuration.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
---
include/hw/arm/aspeed_soc.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index d7b3647ca1..ce431be940 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -67,6 +67,7 @@ struct AspeedSoCState {
MemoryRegion *memory;
MemoryRegion *dram_mr;
MemoryRegion dram_container;
+ MemoryRegion sdram;
MemoryRegion sram;
MemoryRegion spi_boot_container;
MemoryRegion spi_boot;
@@ -171,6 +172,7 @@ struct AspeedSoCClass {
/** valid_cpu_types: NULL terminated array of a single CPU type. */
const char * const *valid_cpu_types;
uint32_t silicon_rev;
+ uint64_t sdram_size;
uint64_t sram_size;
uint64_t secsram_size;
int pcie_num;
--
2.43.0
next prev parent reply other threads:[~2026-05-21 6:53 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-21 6:52 [PATCH v1 0/4] hw/arm: Introduce initial AST1040 support Jamin Lin
2026-05-21 6:52 ` [PATCH v1 1/4] hw/misc/aspeed_scu: Add AST1040 A0 silicon revision ID Jamin Lin
2026-05-21 6:52 ` Jamin Lin [this message]
2026-05-21 6:52 ` [PATCH v1 3/4] hw/arm/aspeed: Introduce AST1040 A0 SoC model Jamin Lin
2026-05-21 8:54 ` Cédric Le Goater
2026-05-22 2:32 ` Jamin Lin
2026-05-21 6:52 ` [PATCH v1 4/4] hw/arm/aspeed: Add AST1040 EVB machine model Jamin Lin
2026-05-21 8:56 ` Cédric Le Goater
2026-05-22 2:02 ` Jamin Lin
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