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Box" To: Rajneesh Bhardwaj , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Hans de Goede Cc: "David E. Box" , platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, Xi Pardee , Srinivas Pandruvada Subject: [PATCH v5 11/16] platform/x86/intel/pmc/ssram: Refactor DEVID/PWRMBASE extraction into helper Date: Thu, 21 May 2026 19:21:41 -0700 Message-ID: <20260522022147.4137494-12-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260522022147.4137494-1-david.e.box@linux.intel.com> References: <20260522022147.4137494-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Move DEVID/PWRMBASE extraction into pmc_ssram_get_devid_pwrmbase(). This is a preparatory refactor to place functionality in a common helper for reuse by a subsequent patch. Additionally add missing bits.h include and define SSRAM_BASE_ADDR_MASK for the address extraction mask. Signed-off-by: David E. Box Reviewed-by: Ilpo J=C3=A4rvinen --- V5 - No changes V4 - No changes V3 - No changes V2 changes: - Added missing include for GENMASK_ULL() used in get_base= () - Defined SSRAM_BASE_ADDR_MASK macro to replace magic mask constant GENMASK_ULL(63, 3) .../platform/x86/intel/pmc/ssram_telemetry.c | 33 ++++++++++++------- 1 file changed, 21 insertions(+), 12 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 4bfe60ee55ca..779e84c724ac 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -5,6 +5,7 @@ * Copyright (c) 2023, Intel Corporation. */ =20 +#include #include #include #include @@ -21,12 +22,30 @@ #define SSRAM_PCH_OFFSET 0x60 #define SSRAM_IOE_OFFSET 0x68 #define SSRAM_DEVID_OFFSET 0x70 +#define SSRAM_BASE_ADDR_MASK GENMASK_ULL(63, 3) =20 DEFINE_FREE(pmc_ssram_telemetry_iounmap, void __iomem *, if (_T) iounmap(_= T)) =20 static struct pmc_ssram_telemetry pmc_ssram_telems[MAX_NUM_PMC]; static bool device_probed; =20 +static inline u64 get_base(void __iomem *addr, u32 offset) +{ + return lo_hi_readq(addr + offset) & SSRAM_BASE_ADDR_MASK; +} + +static void pmc_ssram_get_devid_pwrmbase(void __iomem *ssram, unsigned int= pmc_idx) +{ + u64 pwrm_base; + u16 devid; + + pwrm_base =3D get_base(ssram, SSRAM_PWRM_OFFSET); + devid =3D readw(ssram + SSRAM_DEVID_OFFSET); + + pmc_ssram_telems[pmc_idx].devid =3D devid; + pmc_ssram_telems[pmc_idx].base_addr =3D pwrm_base; +} + static int pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64 ssram_base, void _= _iomem *ssram) { @@ -63,18 +82,12 @@ pmc_ssram_telemetry_add_pmt(struct pci_dev *pcidev, u64= ssram_base, void __iomem return intel_vsec_register(&pcidev->dev, &info); } =20 -static inline u64 get_base(void __iomem *addr, u32 offset) -{ - return lo_hi_readq(addr + offset) & GENMASK_ULL(63, 3); -} - static int pmc_ssram_telemetry_get_pmc(struct pci_dev *pcidev, unsigned int pmc_idx, = u32 offset) { void __iomem __free(pmc_ssram_telemetry_iounmap) *tmp_ssram =3D NULL; void __iomem __free(pmc_ssram_telemetry_iounmap) *ssram =3D NULL; - u64 ssram_base, pwrm_base; - u16 devid; + u64 ssram_base; =20 ssram_base =3D pci_resource_start(pcidev, 0); tmp_ssram =3D ioremap(ssram_base, SSRAM_HDR_SIZE); @@ -99,11 +112,7 @@ pmc_ssram_telemetry_get_pmc(struct pci_dev *pcidev, uns= igned int pmc_idx, u32 of ssram =3D no_free_ptr(tmp_ssram); } =20 - pwrm_base =3D get_base(ssram, SSRAM_PWRM_OFFSET); - devid =3D readw(ssram + SSRAM_DEVID_OFFSET); - - pmc_ssram_telems[pmc_idx].devid =3D devid; - pmc_ssram_telems[pmc_idx].base_addr =3D pwrm_base; + pmc_ssram_get_devid_pwrmbase(ssram, pmc_idx); =20 /* Find and register and PMC telemetry entries */ return pmc_ssram_telemetry_add_pmt(pcidev, ssram_base, ssram); --=20 2.43.0