From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 834DE30674E; Fri, 22 May 2026 02:22:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779416538; cv=none; b=dL+0CG+VUlS4k4p9uxESi3viRosKkD3SYml+fElJO8NtIKSCw9cYfMNdLdbmrvn9sugxsz7NEz8TeKRuz97mnkKnQUVJIrLxrTlNbrsmgAg+4dEyQRrHgzfo0VF720GzhCPfqMenfBPgIfoEFq6zkZLCJ29IfYG50P2obR/lg6E= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1779416538; c=relaxed/simple; bh=ON2+ryHq+e6GQhhSI/WhhklTeeVlX7qGtjiGg0/k1Io=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ew9giS0e/oGaHszKHrG+mNL83E1NlVnZLHyJZvRh/RnGgrNfv3pe1QxzV7rCFkCV+9dgxuIHVx3jSxlkgsdDumTt678bIXW4X5EATobftZocoTynITP+SDctuMxVZlrUfjQlYFfKKBzD/ZUtjb5Pn5yX18G2dNnWhW0Ng2j4Y/w= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=EkgGmSsx; arc=none smtp.client-ip=198.175.65.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="EkgGmSsx" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1779416535; x=1810952535; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ON2+ryHq+e6GQhhSI/WhhklTeeVlX7qGtjiGg0/k1Io=; b=EkgGmSsxltBMpnCAgHESHsI9j+bcRn8EtAqtihUYxIYp/0IdrGQJ995B ddBbYmn6sOqDQ477jrM0mMP53SPw9LM4obz7ogEhyjwsyW1zfggyrv4eg OzWa0aGhAbS2Y8/Wa+kZdHBEzOUYEmdBNgtPHQgPqxT1wXvsCJgpKfrJf zGrIjxL4xne1saTBh1Tal3Iz9pScqN9tU7Lj3Y3lTM7mcU9K2GPetpeSS 69DTu0kamVgc+C8GmNTWnJoyJx9Fqu7rnydGr7o9J9nHqqG+G4BrWbxHb l7PgaLusqBCgM3nprz+IrsZs4bLY4eCgHero6KtRKF2MAnhtC4tXyCyET g==; X-CSE-ConnectionGUID: ApqVX96LR4aXMZdXLHYzKg== X-CSE-MsgGUID: O/RlRXHSTfGxLk9bUoGDaw== X-IronPort-AV: E=McAfee;i="6800,10657,11793"; a="80400557" X-IronPort-AV: E=Sophos;i="6.24,161,1774335600"; d="scan'208";a="80400557" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 May 2026 19:22:01 -0700 X-CSE-ConnectionGUID: 6IUoFVqFTRupgQo2qToEzQ== X-CSE-MsgGUID: eZW8erWjQz+Bi8djS8bD1g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,161,1774335600"; d="scan'208";a="236335389" Received: from debox1-desk4.jf.intel.com ([10.88.27.138]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 May 2026 19:22:00 -0700 From: "David E. Box" To: Rajneesh Bhardwaj , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Hans de Goede Cc: Xi Pardee , platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, "David E . Box" , Srinivas Pandruvada Subject: [PATCH v5 13/16] platform/x86/intel/pmc/ssram: Refactor memory barrier for reentrant probe Date: Thu, 21 May 2026 19:21:43 -0700 Message-ID: <20260522022147.4137494-14-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260522022147.4137494-1-david.e.box@linux.intel.com> References: <20260522022147.4137494-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: platform-driver-x86@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable From: Xi Pardee Previously, a single global 'device_probed' flag with memory barriers was used to prevent callers from reading PMC info before probe completion. The write barrier in probe ensured all data, devid and base_addr, was visible before signaling completion, and the read barrier in callers ensured they checked the flag before reading data. A following commit will make probe reentrant, requiring that a different synchronization flag be used since a single global flag cannot coordinate multiple concurrent probes. Switch to per-index devid publication. Each probe instance writes base_addr first, then a write barrier ensures visibility before devid is written as the completion signal. Callers check devid first, then use a read barrier before reading base_addr. This per-index approach allows multiple probes to work independently while maintaining the same memory ordering guarantees. Signed-off-by: Xi Pardee Signed-off-by: David E. Box --- V5 - No changes V4 - No changes V3 - No changes V2 changes: - Expanded commit message to explain synchronization rationale - Remove unused probe_finish label associated with the old global flag .../platform/x86/intel/pmc/ssram_telemetry.c | 40 ++++++++----------- 1 file changed, 16 insertions(+), 24 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/ssram_telemetry.c b/drivers/pla= tform/x86/intel/pmc/ssram_telemetry.c index 6917a10cbc80..597bfb7ad822 100644 --- a/drivers/platform/x86/intel/pmc/ssram_telemetry.c +++ b/drivers/platform/x86/intel/pmc/ssram_telemetry.c @@ -40,7 +40,6 @@ static const struct ssram_type pci_main =3D { }; =20 static struct pmc_ssram_telemetry pmc_ssram_telems[MAX_NUM_PMC]; -static bool device_probed; =20 static inline u64 get_base(void __iomem *addr, u32 offset) { @@ -55,8 +54,13 @@ static void pmc_ssram_get_devid_pwrmbase(void __iomem *s= sram, unsigned int pmc_i pwrm_base =3D get_base(ssram, SSRAM_PWRM_OFFSET); devid =3D readw(ssram + SSRAM_DEVID_OFFSET); =20 - pmc_ssram_telems[pmc_idx].devid =3D devid; pmc_ssram_telems[pmc_idx].base_addr =3D pwrm_base; + /* + * Memory barrier is used to ensure the correct write order between base_= addr + * and devid. + */ + smp_wmb(); + pmc_ssram_telems[pmc_idx].devid =3D devid; } =20 static int @@ -154,32 +158,28 @@ static int pmc_ssram_telemetry_pci_init(struct pci_de= v *pcidev) * * 0 - Success * * -EAGAIN - Probe function has not finished yet. Try again. * * -EINVAL - Invalid pmc_idx - * * -ENODEV - PMC device is not available */ int pmc_ssram_telemetry_get_pmc_info(unsigned int pmc_idx, struct pmc_ssram_telemetry *pmc_ssram_telemetry) { + if (pmc_idx >=3D MAX_NUM_PMC) + return -EINVAL; + /* * PMCs are discovered in probe function. If this function is called befo= re - * probe function complete, the result would be invalid. Use device_probed - * variable to avoid this case. Return -EAGAIN to inform the consumer to = call + * probe function complete, the result would be invalid. Use devid to avo= id + * this case. Return -EAGAIN to inform the consumer to call * again later. */ - if (!device_probed) + if (!pmc_ssram_telems[pmc_idx].devid) return -EAGAIN; =20 + pmc_ssram_telemetry->devid =3D pmc_ssram_telems[pmc_idx].devid; /* * Memory barrier is used to ensure the correct read order between - * device_probed variable and PMC info. + * devid variable and base_addr. */ smp_rmb(); - if (pmc_idx >=3D MAX_NUM_PMC) - return -EINVAL; - - if (!pmc_ssram_telems[pmc_idx].devid) - return -ENODEV; - - pmc_ssram_telemetry->devid =3D pmc_ssram_telems[pmc_idx].devid; pmc_ssram_telemetry->base_addr =3D pmc_ssram_telems[pmc_idx].base_addr; return 0; } @@ -194,8 +194,7 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *pc= idev, const struct pci_de ssram_type =3D (const struct ssram_type *)id->driver_data; if (!ssram_type) { dev_dbg(&pcidev->dev, "missing driver data\n"); - ret =3D -EINVAL; - goto probe_finish; + return -EINVAL; } =20 method =3D ssram_type->method; @@ -203,7 +202,7 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *pc= idev, const struct pci_de ret =3D pcim_enable_device(pcidev); if (ret) { dev_dbg(&pcidev->dev, "failed to enable PMC SSRAM device\n"); - goto probe_finish; + return ret; } =20 if (method =3D=3D RES_METHOD_PCI) @@ -211,13 +210,6 @@ static int pmc_ssram_telemetry_probe(struct pci_dev *p= cidev, const struct pci_de else ret =3D -EINVAL; =20 -probe_finish: - /* - * Memory barrier is used to ensure the correct write order between PMC i= nfo - * and device_probed variable. - */ - smp_wmb(); - device_probed =3D true; return ret; } =20 --=20 2.43.0