From: Stefan Hajnoczi <stefanha@redhat.com>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [PULL 00/32] Single binary patches for 2026-05-27
Date: Wed, 27 May 2026 18:49:50 -0400 [thread overview]
Message-ID: <20260527224950.GA13366@fedora> (raw)
In-Reply-To: <20260527103037.4461-1-philmd@linaro.org>
[-- Attachment #1: Type: text/plain, Size: 116 bytes --]
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/11.1 for any user-visible changes.
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
prev parent reply other threads:[~2026-05-27 22:50 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-27 10:30 [PULL 00/32] Single binary patches for 2026-05-27 Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 01/32] hw/riscv: Register generic riscv[32|64] QOM interfaces Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 02/32] hw/riscv: Add macros and globals for simplifying machine definitions Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 03/32] hw/core: Add riscv[32|64] to "none" machine Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 04/32] hw/riscv: Filter machine types for qemu-system-riscv32/64 binaries Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 05/32] hw/riscv/spike: Use 'max' CPU type by default Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 06/32] configs/target: Implement per-binary TargetInfo structure for riscv Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 07/32] target-info: Add target_riscv64() Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 08/32] target/riscv: Define MSTATUS_SBE and MSTATUS_MBE bit masks Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 09/32] target/riscv: Use float_raise Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 10/32] target/hppa: Use DisasContext::mo_align in system emulation Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 11/32] target/hppa: Inline UNALIGN() macro Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 12/32] hw/arm/raspi: Initialize 64-bit CPU types during DeviceRealize() Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 13/32] hw/arm/raspi: Build objects once Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 14/32] hw/arm/aspeed: Do not realize 64-bit CPU types under QTest Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 15/32] hw/arm/aspeed: Build objects once Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 16/32] hw/arm/meson: Remove now unused arm_ss[] source set Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 17/32] target/arm: Introduce common system/user meson " Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 18/32] target/arm: Build gdbstub64.o as common object Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 19/32] target/arm: Build cpu64.o " Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 20/32] target/arm: Extract common code related to 'max' CPU Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 21/32] target/arm: Use make_ccsidr(LEGACY) in 32 bit 'max' CPU type Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 22/32] target/arm: Implement DBGDEVID* registers in max AArch32 CPU Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 23/32] target/arm: Only set %kvm_target when KVM is enabled Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 24/32] target/arm: Factor aarch64_aa32_a57_init() out Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 25/32] target/arm: Re-use common aarch64_aa32_a57_init() helper Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 26/32] target/arm: Define 'max' CPU type in cpu-max.c Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 27/32] target/arm: Build cpu32-system.o as common object Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 28/32] target/arm: Build cpu-max.c once Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 29/32] tests/tcg: Explicitly check for 64-bit z/Architecture Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 30/32] MAINTAINERS: Remove PhilMD from firmware sections Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 31/32] MAINTAINERS: update qualcomm git tree URL Philippe Mathieu-Daudé
2026-05-27 10:30 ` [PULL 32/32] MAINTAINERS: Update PhilMD's email address Philippe Mathieu-Daudé
2026-05-27 22:49 ` Stefan Hajnoczi [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260527224950.GA13366@fedora \
--to=stefanha@redhat.com \
--cc=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.