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From: sashiko-bot@kernel.org
To: "Rudraksha Gupta via B4 Relay" <devnull+guptarud.gmail.com@kernel.org>
Cc: conor+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 3/3] ARM: dts: qcom: msm8960: Add CPU frequency scaling support
Date: Thu, 28 May 2026 04:43:17 +0000	[thread overview]
Message-ID: <20260528044317.6273E1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260527-expressatt_cpufreq-v2-3-b9b7726ccb6d@gmail.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] The Krait CPU frequency nvmem parsing functions incorrectly cast a `u8 *` buffer directly to a `u32 *` to read the efuse registers, leading to endianness issues on big-endian systems.
--

commit dde749d736e7e3301796875cc37f978b7980ba69
Author: Rudraksha Gupta <guptarud@gmail.com>

ARM: dts: qcom: msm8960: Add CPU frequency scaling support

Enable Krait DVFS on MSM8960 by adding the required device tree nodes for
the OPP table, Krait clock controller, PVS efuse nvmem cell, and CPU idle
state.

Link: https://github.com/CyanogenMod/android_kernel_samsung_d2/blob/0dbe2b56847b304d30b809dfd08ba3b4a61d9af8/arch/arm/mach-msm/acpuclock-8960.c#L120-L235

> diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> index fd28401cebb5e..d4f4681974c5a 100644
> --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi

[ ... ]

> @@ -74,6 +82,123 @@ l2: l2-cache {
>  			cache-level = <2>;
>  			cache-unified;
>  		};
> +
> +		idle-states {
> +			cpu_spc: cpu-spc {
> +				compatible = "qcom,idle-state-spc", "arm,idle-state";
> +				entry-latency-us = <400>;
> +				exit-latency-us = <900>;
> +				min-residency-us = <3000>;
> +			};
> +		};
> +	};
> +
> +	cpu_opp_table: opp-table-cpu {
> +		compatible = "operating-points-v2-krait-cpu";
> +		nvmem-cells = <&pvs_efuse>;

[Severity: High]
This is a pre-existing issue, but does reading this efuse have an endianness
problem in the driver?

Looking at get_krait_bin_format_a() and get_krait_bin_format_b() in
drivers/cpufreq/qcom-cpufreq-nvmem.c, the code casts the u8 * buffer directly
to a u32 * to read the efuse registers, rather than using endian-safe
accessors like get_unaligned_le32().

On big-endian systems, would this read the nvmem data in reversed byte order,
resulting in incorrect speed and PVS bins being extracted and potentially
causing over or under-voltage issues by selecting the wrong operating points?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260527-expressatt_cpufreq-v2-0-b9b7726ccb6d@gmail.com?part=3

      reply	other threads:[~2026-05-28  4:43 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-28  3:39 [PATCH v2 0/3] Add cpufreq to MSM8960 Rudraksha Gupta
2026-05-28  3:39 ` Rudraksha Gupta via B4 Relay
2026-05-28  3:39 ` [PATCH v2 1/3] dt-bindings: opp: Allow optional -vN suffix in opp-microvolt property name Rudraksha Gupta
2026-05-28  3:39   ` Rudraksha Gupta via B4 Relay
2026-05-28  6:35   ` Dmitry Baryshkov
2026-07-13 11:14     ` Rudraksha Gupta
2026-05-28  3:39 ` [PATCH v2 2/3] soc: qcom: spm: Add MSM8960 SAW2 CPU support Rudraksha Gupta
2026-05-28  3:39   ` Rudraksha Gupta via B4 Relay
2026-05-28  4:18   ` sashiko-bot
2026-05-28  6:04   ` Dmitry Baryshkov
2026-05-28  3:39 ` [PATCH v2 3/3] ARM: dts: qcom: msm8960: Add CPU frequency scaling support Rudraksha Gupta
2026-05-28  3:39   ` Rudraksha Gupta via B4 Relay
2026-05-28  4:43   ` sashiko-bot [this message]

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