From: sashiko-bot@kernel.org
To: "Nicolin Chen" <nicolinc@nvidia.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: [PATCH v2 04/11] iommu/arm-smmu-v3: Drain in-flight fault handlers
Date: Thu, 28 May 2026 11:45:23 +0000 [thread overview]
Message-ID: <20260528114524.280D61F000E9@smtp.kernel.org> (raw)
In-Reply-To: <c107dd18765780ad48c3f6d30e52cbe33fb34e22.1779944354.git.nicolinc@nvidia.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The EVTQ drain logic introduced to fix a Use-After-Free vulnerability is flawed: it fails to fully prevent the UAF and introduces a new deadlock vector.
--
commit 0c247207412e55b576df6d5bf6788056a0ed654c
Author: Nicolin Chen <nicolinc@nvidia.com>
iommu/arm-smmu-v3: Drain in-flight fault handlers
This commit attempts to fix a use-after-free vulnerability by draining
the SMMU hardware event queue and the IOMMU core IOPF software
workqueue during a domain detach or replace operation. It introduces
logic to poll the event queue and synchronize the IRQ handlers before
flushing the IOPF queue.
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -3267,10 +3267,29 @@ void arm_smmu_attach_release(struct arm_smmu_attach_state *state)
> struct arm_smmu_master_domain *master_domain = state->old_master_domain;
> struct arm_smmu_master *master = state->master;
>
> + lockdep_assert_not_held(&arm_smmu_asid_lock);
> iommu_group_mutex_assert(master->dev);
>
> if (!master_domain)
> return;
> +
> + if (master_domain->using_iopf) {
> + struct arm_smmu_device *smmu = master->smmu;
> +
> + /* Drain the hardware eventq */
> + if (master->stall_enabled) {
> + arm_smmu_drain_queue_for_iopf(smmu, &smmu->evtq.q);
> + /* Ensure pending events have reached the IOPF queue */
> + if (smmu->evtq.q.irq)
> + synchronize_irq(smmu->evtq.q.irq);
[Severity: High]
Since arm_smmu_attach_dev() installs the new Stream Table Entry (STE)
before calling arm_smmu_attach_release(), the SMMU can start generating
new faults under the new domain's configuration while this code executes.
Because the attach_dev driver callback hasn't returned yet, the IOMMU
core hasn't updated the device's attach_handle.
Could the concurrent event queue threaded handler read the old
attach_handle and route these new faults to the old domain's handler?
Since arm_smmu_drain_queue_for_iopf() only drains up to a snapshot of
the queue producer index, wouldn't these newly generated faults remain
queued against the old handle, leading to the same use-after-free this
attempts to fix when the core frees the old handle?
Additionally, is it safe to call synchronize_irq() here while holding
the iommu_group_mutex?
Since the event queue is shared across all devices on the SMMU, and the
arm_smmu_evtq_thread() handler processes faults in an unbounded loop,
could a continuous stream of faults from another device prevent the
handler from exiting? This might cause synchronize_irq() to block
indefinitely and deadlock the attach operation.
> + }
> + /* Pending events might be in the combined_irq handler */
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1779944354.git.nicolinc@nvidia.com?part=4
next prev parent reply other threads:[~2026-05-28 11:45 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-28 7:59 [PATCH v2 00/11] iommu/arm-smmu-v3: Add PRI support Nicolin Chen
2026-05-28 7:59 ` [PATCH v2 01/11] iommu/arm-smmu-v3: Add arm_smmu_attach_release() Nicolin Chen
2026-05-28 7:59 ` [PATCH v2 02/11] iommu/arm-smmu-v3: Factor out __queue_empty() and __queue_consumed() Nicolin Chen
2026-05-28 7:59 ` [PATCH v2 03/11] iommu/arm-smmu-v3: Add arm_smmu_drain_queue_for_iopf() helper Nicolin Chen
2026-05-28 8:43 ` sashiko-bot
2026-05-28 7:59 ` [PATCH v2 04/11] iommu/arm-smmu-v3: Drain in-flight fault handlers Nicolin Chen
2026-05-28 11:45 ` sashiko-bot [this message]
2026-05-28 7:59 ` [PATCH v2 05/11] iommu/arm-smmu-v3: Submit CMDQ_OP_PRI_RESP for IOPF event Nicolin Chen
2026-05-28 7:59 ` [PATCH v2 06/11] iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr() Nicolin Chen
2026-05-30 4:59 ` sashiko-bot
2026-05-28 7:59 ` [PATCH v2 07/11] iommu/arm-smmu-v3: Disable PRI when no IRQ handler is registered Nicolin Chen
2026-05-28 9:13 ` sashiko-bot
2026-05-28 7:59 ` [PATCH v2 08/11] iommu/arm-smmu-v3: Allocate IOPF queue for ARM_SMMU_FEAT_PRI Nicolin Chen
2026-05-28 8:59 ` sashiko-bot
2026-05-28 7:59 ` [PATCH v2 09/11] PCI/ATS: Add PRI stubs Nicolin Chen
2026-05-28 7:59 ` [PATCH v2 10/11] PCI/ATS: Export pci_enable_pri() and pci_reset_pri() Nicolin Chen
2026-05-28 7:59 ` [PATCH v2 11/11] iommu/arm-smmu-v3: Enable PRI for PCI device in arm_smmu_probe_device() Nicolin Chen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260528114524.280D61F000E9@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=nicolinc@nvidia.com \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.