From: sashiko-bot@kernel.org
To: "Linus Walleij" <linusw@kernel.org>
Cc: conor+dt@kernel.org, devicetree@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH net-next v3 4/5] net: dsa: microchip: Support Microchip KSZ8995XA / KS8995XA
Date: Sat, 30 May 2026 00:49:01 +0000 [thread overview]
Message-ID: <20260530004901.F23501F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260526-ks8995-to-ksz8-v3-4-c530f651989f@kernel.org>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The KSZ8995XA PHY register emulation incorrectly maps and overwrites fundamental port control bits, disabling RX/TX and MAC learning.
--
commit 2e706ae441971159b4241c28e24cf8f143178ad5
Author: Linus Walleij <linusw@kernel.org>
net: dsa: microchip: Support Microchip KSZ8995XA / KS8995XA
This adds support for the Microchip KSZ8995XA also known as the
Micrel KS8995XA switch to the KSZ driver.
> diff --git a/drivers/net/dsa/microchip/ksz_common.c b/drivers/net/dsa/microchip/ksz_common.c
> index 57c8abfe0147d..ac27beb3054bd 100644
> --- a/drivers/net/dsa/microchip/ksz_common.c
> +++ b/drivers/net/dsa/microchip/ksz_common.c
[ ... ]
> @@ -554,6 +554,20 @@ static const u8 ksz8895_shifts[] = {
> [DYNAMIC_MAC_SRC_PORT] = 24,
> };
>
> +static const u16 ksz8995xa_regs[] = {
> + [REG_SW_MAC_ADDR] = 0x68,
> + [P_FORCE_CTRL] = 0x0C,
> + [P_LINK_STATUS] = 0x0E,
> + [P_LOCAL_CTRL] = 0x0C,
> + [P_NEG_RESTART_CTRL] = 0x0D,
[Severity: High]
Will this register mapping inadvertently disable RX/TX and MAC learning?
The newly introduced ksz8995xa_regs array maps P_LOCAL_CTRL and P_FORCE_CTRL
to 0x0C, and P_NEG_RESTART_CTRL to 0x0D. The driver's PHY emulation
functions (ksz8_w_phy and ksz8_w_phy_bmcr) apply KSZ8795-specific bitmasks
to these offsets.
On the KSZ8995XA, offset 0x0C resolves to Port Control 12 (e.g., 0x1C for
Port 1), where BIT 4 is Receive Enable and BIT 3 is Transmit Enable. When
updating MII_ADVERTISE, the emulation applies PORT_AUTO_NEG_SYM_PAUSE (BIT 4)
and PORT_AUTO_NEG_100BTX_FD (BIT 3). Clearing these advertisement bits
appears to inadvertently disable RX and TX on the port.
Similarly, setting PORT_FORCE_FULL_DUPLEX (BIT 5) via MII_BMCR sets Learning
Disable. When phylink automatically configures the PHY on startup, these
writes could execute and completely break the switch port's network
functionality.
> + [P_REMOTE_STATUS] = 0x0E,
> + [P_SPEED_STATUS] = 0x09,
> + [P_STP_CTRL] = 0x02,
> + [S_START_CTRL] = 0x01,
> + [S_BROADCAST_CTRL] = 0x06,
> + [S_MULTICAST_CTRL] = 0x04,
> +};
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260526-ks8995-to-ksz8-v3-0-c530f651989f@kernel.org?part=4
next prev parent reply other threads:[~2026-05-30 0:49 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-26 15:59 [PATCH net-next v3 0/5] net: dsa: microchip: Add support for KSZ8995XA/KS8995XA Linus Walleij
2026-05-26 15:59 ` [PATCH net-next v3 1/5] net: dsa: microchip: Add fallback Micrel compatibles Linus Walleij
2026-05-30 0:49 ` sashiko-bot
2026-06-01 7:43 ` Linus Walleij
2026-06-01 9:34 ` Nicolai Buchwitz
2026-05-26 15:59 ` [PATCH net-next v3 2/5] dt-bindings: net: dsa: microchip: Add KSZ8995XA Linus Walleij
2026-05-26 15:59 ` [PATCH net-next v3 3/5] net: dsa: tag_ks8995: Add the KS8995 tag handling Linus Walleij
2026-05-30 0:49 ` sashiko-bot
2026-06-01 7:47 ` Linus Walleij
2026-06-01 10:30 ` Paolo Abeni
2026-05-26 15:59 ` [PATCH net-next v3 4/5] net: dsa: microchip: Support Microchip KSZ8995XA / KS8995XA Linus Walleij
2026-05-30 0:49 ` sashiko-bot [this message]
2026-06-01 7:52 ` Linus Walleij
2026-05-26 15:59 ` [PATCH net-next v3 5/5] net: dsa: ks8995: Delete surplus driver Linus Walleij
2026-05-30 0:49 ` sashiko-bot
2026-06-01 8:09 ` Linus Walleij
2026-06-01 10:41 ` Paolo Abeni
2026-06-01 13:12 ` Linus Walleij
2026-06-01 14:38 ` Paolo Abeni
2026-06-01 9:45 ` Nicolai Buchwitz
2026-06-01 8:11 ` [PATCH net-next v3 0/5] net: dsa: microchip: Add support for KSZ8995XA/KS8995XA Linus Walleij
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