From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D650B2773DE; Sat, 30 May 2026 18:42:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780166576; cv=none; b=sknQPp8s2rvwEDlvIXH52tyy8Rdzteue3VQMJYBWc4DQXOKxzsYIxkq+PJNdXb647TPcA6Lf0QGA3QYw7oxtwyEx+8LUxEey2IeH7+wYk4Ybsvwx4mLYFa3ghbJd8/30BqJakefJArzPQrO+Jhb2RSeSozjUaunOBPvUFiemc5w= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1780166576; c=relaxed/simple; bh=/8qAHwTZVqQF9P1Jz/OxD080nwtbyQ8HsynCgL6Wm0E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fj7WgJFASXl8muvgfqM4W2qlfTx1pp3H/wFrBJPwH3I4l3HbyS7zsaUTZHtAMz9tj0pzvvJad0x6GZRYCeSlUba2JgQ5ZyJGSTcVIZmTP7qTkjx+DmLUc5+Fc3j9sBmCMUICoaPMuRsaLAtyUJ4UrSSP7qn+TIIROltzneYMH4w= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=nOGRB4OC; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="nOGRB4OC" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E5A661F00893; Sat, 30 May 2026 18:42:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1780166575; bh=GzzURXyE4SemXx2fA0t61EvfPE+tFL83HO3MjMY70Uc=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=nOGRB4OCLZYcPgyizw9jQ6g8QhWpuKcVQ10xmzkPlX4swGe2tAkQBEC9jbTRXbSfp TK51/hfRWFZYMKVRpLBfd2OmcrGIISrg6HahiH7TUMIKDJhBMUVR3j39i1/qhIRnwG aoYmYYRMi7LuxKr8xLxcfO/UgEY+K36y8C//LEuw= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Konrad Dybcio , Dmitry Baryshkov , Taniya Das , Bjorn Andersson , Sasha Levin , Val Packett Subject: [PATCH 5.10 407/589] clk: qcom: dispcc-sc7180: Add missing MDSS resets Date: Sat, 30 May 2026 18:04:48 +0200 Message-ID: <20260530160235.462706768@linuxfoundation.org> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260530160224.570625122@linuxfoundation.org> References: <20260530160224.570625122@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Konrad Dybcio [ Upstream commit b0bc6011c5499bdfddd0390262bfa13dce1eff74 ] The MDSS resets have so far been left undescribed. Fix that. Fixes: dd3d06622138 ("clk: qcom: Add display clock controller driver for SC7180") Signed-off-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Reviewed-by: Taniya Das Tested-by: Val Packett # sc7180-ecs-liva-qc710 Link: https://lore.kernel.org/r/20260120-topic-7180_dispcc_bcr-v1-2-0b1b442156c3@oss.qualcomm.com Signed-off-by: Bjorn Andersson Signed-off-by: Sasha Levin --- drivers/clk/qcom/dispcc-sc7180.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/clk/qcom/dispcc-sc7180.c b/drivers/clk/qcom/dispcc-sc7180.c index f487515701e36..11bbf1dd83880 100644 --- a/drivers/clk/qcom/dispcc-sc7180.c +++ b/drivers/clk/qcom/dispcc-sc7180.c @@ -16,6 +16,7 @@ #include "clk-regmap-divider.h" #include "common.h" #include "gdsc.h" +#include "reset.h" enum { P_BI_TCXO, @@ -634,6 +635,11 @@ static struct gdsc mdss_gdsc = { .flags = HW_CTRL, }; +static const struct qcom_reset_map disp_cc_sc7180_resets[] = { + [DISP_CC_MDSS_CORE_BCR] = { 0x2000 }, + [DISP_CC_MDSS_RSCC_BCR] = { 0x4000 }, +}; + static struct gdsc *disp_cc_sc7180_gdscs[] = { [MDSS_GDSC] = &mdss_gdsc, }; @@ -685,6 +691,8 @@ static const struct qcom_cc_desc disp_cc_sc7180_desc = { .config = &disp_cc_sc7180_regmap_config, .clks = disp_cc_sc7180_clocks, .num_clks = ARRAY_SIZE(disp_cc_sc7180_clocks), + .resets = disp_cc_sc7180_resets, + .num_resets = ARRAY_SIZE(disp_cc_sc7180_resets), .gdscs = disp_cc_sc7180_gdscs, .num_gdscs = ARRAY_SIZE(disp_cc_sc7180_gdscs), }; -- 2.53.0