From: sashiko-bot@kernel.org
To: "Yong-Xuan Wang" <yongxuan.wang@sifive.com>
Cc: kvm@vger.kernel.org
Subject: Re: [PATCH v5 1/5] KVM: RISC-V: SBI FWFT: Mark vCPU CSRs dirty after setting feature value
Date: Mon, 01 Jun 2026 11:04:10 +0000 [thread overview]
Message-ID: <20260601110411.030C41F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260601-kvm-get_reg_list-v2-v5-1-415d08a2813b@sifive.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Unconditional setting of csr_dirty contradicts the commit message design intent.
--
commit acd5b6b18e2d1bc390b68230f877d70bd8155368
Author: Yong-Xuan Wang <yongxuan.wang@sifive.com>
KVM: RISC-V: SBI FWFT: Mark vCPU CSRs dirty after setting feature value
This commit updates KVM on RISC-V to mark vCPU CSRs as dirty when an FWFT
feature value is updated. This prevents the guest from observing stale CSR
states after vCPU scheduling or migration by ensuring the modified state is
properly synchronized.
> diff --git a/arch/riscv/kvm/vcpu_sbi_fwft.c b/arch/riscv/kvm/vcpu_sbi_fwft.c
> index 2eab15339694f..5e4aafb0cbf16 100644
> --- a/arch/riscv/kvm/vcpu_sbi_fwft.c
> +++ b/arch/riscv/kvm/vcpu_sbi_fwft.c
> @@ -521,6 +521,7 @@ static int kvm_sbi_ext_fwft_set_reg(struct kvm_vcpu *vcpu, unsigned long reg_num
> break;
> case 2:
> ret = conf->feature->set(vcpu, conf, true, value);
> + vcpu->arch.csr_dirty = true;
[Severity: Medium]
The commit message mentions marking the CSRs dirty after successfully setting
an FWFT feature value. Does kvm_sbi_ext_fwft_set_reg() unconditionally set
vcpu->arch.csr_dirty to true, even if conf->feature->set() fails and returns
an error?
Could this lead to unnecessary CSR hardware reloads on error paths since the
return value in ret is not checked before modifying the dirty flag?
> break;
> default:
> return -ENOENT;
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260601-kvm-get_reg_list-v2-v5-0-415d08a2813b@sifive.com?part=1
next prev parent reply other threads:[~2026-06-01 11:04 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-01 10:26 [PATCH v5 0/5] KVM: riscv: Fix stale FWFT feature exposure and enhance selftests Yong-Xuan Wang
2026-06-01 10:26 ` Yong-Xuan Wang
2026-06-01 10:26 ` Yong-Xuan Wang
2026-06-01 10:26 ` [PATCH v5 1/5] KVM: RISC-V: SBI FWFT: Mark vCPU CSRs dirty after setting feature value Yong-Xuan Wang
2026-06-01 10:26 ` Yong-Xuan Wang
2026-06-01 10:26 ` Yong-Xuan Wang
2026-06-01 11:04 ` sashiko-bot [this message]
2026-06-05 15:30 ` Anup Patel
2026-06-05 15:30 ` Anup Patel
2026-06-05 15:30 ` Anup Patel
2026-06-01 10:26 ` [PATCH v5 2/5] KVM: RISC-V: SBI FWFT: Add optional init() callback for hardware probing Yong-Xuan Wang
2026-06-01 10:26 ` Yong-Xuan Wang
2026-06-01 10:26 ` Yong-Xuan Wang
2026-06-05 16:11 ` Anup Patel
2026-06-05 16:11 ` Anup Patel
2026-06-05 16:11 ` Anup Patel
2026-06-01 10:26 ` [PATCH v5 3/5] KVM: RISC-V: SBI FWFT: Fix stale feature exposure after runtime extension changes Yong-Xuan Wang
2026-06-01 10:26 ` Yong-Xuan Wang
2026-06-01 10:26 ` Yong-Xuan Wang
2026-06-01 11:37 ` sashiko-bot
2026-06-05 16:12 ` Anup Patel
2026-06-05 16:12 ` Anup Patel
2026-06-05 16:12 ` Anup Patel
2026-06-01 10:26 ` [PATCH v5 4/5] KVM: riscv: selftests: Refactor ISA and SBI extension sublist macros Yong-Xuan Wang
2026-06-01 10:26 ` Yong-Xuan Wang
2026-06-01 10:26 ` Yong-Xuan Wang
2026-06-05 16:13 ` Anup Patel
2026-06-05 16:13 ` Anup Patel
2026-06-05 16:13 ` Anup Patel
2026-06-01 10:26 ` [PATCH v5 5/5] KVM: riscv: selftests: Split SBI FWFT into separate feature-specific sublists Yong-Xuan Wang
2026-06-01 10:26 ` Yong-Xuan Wang
2026-06-01 10:26 ` Yong-Xuan Wang
2026-06-01 11:54 ` sashiko-bot
2026-06-04 9:28 ` Yong-Xuan Wang
2026-06-05 16:14 ` Anup Patel
2026-06-05 16:14 ` Anup Patel
2026-06-05 16:14 ` Anup Patel
2026-06-05 16:16 ` [PATCH v5 0/5] KVM: riscv: Fix stale FWFT feature exposure and enhance selftests Anup Patel
2026-06-05 16:16 ` Anup Patel
2026-06-05 16:16 ` Anup Patel
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