Re: [PATCH v6 07/12] media: microchip-isc: configure DPC and pipeline for SAMA7G5

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Green Disparity Correction (DPC_GDCENABLE) is omitted for YUV and GREY output formats.
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commit 4ad55e55f4026d00b689214d6dbbe7f59a62bf02
Author: Balakrishnan Sambath <balakrishnan.s@microchip.com>

media: microchip-isc: configure DPC and pipeline for SAMA7G5

Enable DPC black level and green disparity correction for raw Bayer
to RGB conversion. Bypass the pipeline for raw Bayer output so
software ISPs (libcamera) receive unmodified sensor data.

> diff --git a/drivers/media/platform/microchip/microchip-isc-base.c b/drivers/media/platform/microchip/microchip-isc-base.c
> index f61a5d5a3e045..ff920019fe371 100644
> --- a/drivers/media/platform/microchip/microchip-isc-base.c
> +++ b/drivers/media/platform/microchip/microchip-isc-base.c
> @@ -800,7 +800,7 @@ static int isc_try_configure_pipeline(struct isc_device *isc)
>  		if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) {
>  			isc->try_config.bits_pipeline = CFA_ENABLE |
>  				WB_ENABLE | GAM_ENABLES | DPC_BLCENABLE |
> -				CC_ENABLE;
> +				DPC_GDCENABLE | CC_ENABLE;
>  		} else {
>  			isc->try_config.bits_pipeline = 0x0;
>  		}

[ ... ]

> @@ -810,7 +810,7 @@ static int isc_try_configure_pipeline(struct isc_device *isc)
>  		if (ISC_IS_FORMAT_RAW(isc->try_config.sd_format->mbus_code)) {
>  			isc->try_config.bits_pipeline = CFA_ENABLE |
>  				CSC_ENABLE | GAM_ENABLES | WB_ENABLE |
> -				SUB420_ENABLE | SUB422_ENABLE | CBC_ENABLE |
> +				SUB420_ENABLE | SUB422_ENABLE | CBHS_ENABLE |
>  				DPC_BLCENABLE;

[Severity: Medium]
Should DPC_GDCENABLE also be included here and for the other YUV and GREY
formats in this switch statement?

Since these formats also originate from raw Bayer data and pass through the CFA
(Color Filter Array) block, would they also require the same pre-demosaicing
green disparity correction that was added for the RGB formats above?

>  		} else {
>  			isc->try_config.bits_pipeline = 0x0;
>  		}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260603-microchip-isc-fixes-v6-0-8c3d7474a768@microchip.com?part=7