From: Zide Chen <zide.chen@intel.com>
To: qemu-devel@nongnu.org, kvm@vger.kernel.org,
Paolo Bonzini <pbonzini@redhat.com>,
Zhao Liu <zhao1.liu@intel.com>, Peter Xu <peterx@redhat.com>,
Fabiano Rosas <farosas@suse.de>,
Sandipan Das <sandipan.das@amd.com>
Cc: Xiaoyao Li <xiaoyao.li@intel.com>,
Dongli Zhang <dongli.zhang@oracle.com>,
Dapeng Mi <dapeng1.mi@linux.intel.com>,
Zide Chen <zide.chen@intel.com>
Subject: [PATCH v4 0/6] target/i386: Misc PMU fixes and enabling
Date: Wed, 3 Jun 2026 19:55:40 -0700 [thread overview]
Message-ID: <20260604025546.19378-1-zide.chen@intel.com> (raw)
This series contains a set of fixes, cleanups, and improvements in
target/i386 PMU and MSR handling, including Topdown metrics support.
This version drops some patches that raised more questions in earlier
reviews in order to reduce scope and speed up review and integration.
Patch series overview:
Patches 1-5: Miscellaneous PMU/MSR fixes and cleanups.
Patch 6: Add Topdown metrics feature support.
The KVM patch series for Topdown metrics support:
https://lore.kernel.org/kvm/20260226230606.146532-1-zide.chen@intel.com/T/#t
Changes in v4:
- Drop PEBS-related patches to reduce scope and accelerate merging.
- Drop disbale BTS support patch.
- Reorder and renumber remaining patches (now 6 total).
- Add defensive assert in kvm_init_msrs() in patch 5.
Changes in v3:
- Add new patch 13/13 to support Topdown metrics.
- Separate the adjustment of maximum PMU counters to patch 4/13, in
order not to bump PMU migration version_id twice.
- Re-base on top of most recent mainline QEMU: d8a9d97317d0
- Remove MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR in patch 2/13.
- Do not support pebs-fmt=0.
- Fix the vmstate name of msr_ds_pebs.
- Misc fixes and cleanup.
Changes in v2:
- Add two new patches to clean up and refactor LBR format handling.
- Introduce a new pebs-fmt command-line option.
- Add a patch to avoid exposing PEBS capabilities when not enabled.
- Trivial fixes and cleanups.
v3: https://lore.kernel.org/qemu-devel/20260304180713.360471-1-zide.chen@intel.com/
v2: https://lore.kernel.org/qemu-devel/20260128231003.268981-1-zide.chen@intel.com/
v1: https://lore.kernel.org/qemu-devel/20260117011053.80723-1-zide.chen@intel.com/
Dapeng Mi (3):
target/i386: Don't save/restore PERF_GLOBAL_OVF_CTRL MSRs
target/i386: Support full-width writes for perf counters
target/i386: Add Topdown metrics feature support
Zide Chen (3):
target/i386: Gate enable_pmu on kvm_enabled()
target/i386: Adjust maximum number of PMU counters
target/i386: Increase MSR_BUF_SIZE and split KVM_[GET/SET]_MSRS calls
target/i386/cpu.c | 11 ++--
target/i386/cpu.h | 17 +++--
target/i386/kvm/kvm.c | 150 +++++++++++++++++++++++++++++++++---------
target/i386/machine.c | 32 +++++++--
4 files changed, 161 insertions(+), 49 deletions(-)
--
2.54.0
next reply other threads:[~2026-06-04 3:04 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-04 2:55 Zide Chen [this message]
2026-06-04 2:55 ` [PATCH v4 1/6] target/i386: Don't save/restore PERF_GLOBAL_OVF_CTRL MSRs Zide Chen
2026-06-05 14:18 ` Fabiano Rosas
2026-06-05 14:47 ` Sandipan Das
2026-06-04 2:55 ` [PATCH v4 2/6] target/i386: Gate enable_pmu on kvm_enabled() Zide Chen
2026-06-05 14:48 ` Sandipan Das
2026-06-04 2:55 ` [PATCH v4 3/6] target/i386: Adjust maximum number of PMU counters Zide Chen
2026-06-04 2:55 ` [PATCH v4 4/6] target/i386: Support full-width writes for perf counters Zide Chen
2026-06-04 2:55 ` [PATCH v4 5/6] target/i386: Increase MSR_BUF_SIZE and split KVM_[GET/SET]_MSRS calls Zide Chen
2026-06-04 2:55 ` [PATCH v4 6/6] target/i386: Add Topdown metrics feature support Zide Chen
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